S1R72U16 查看數據表（PDF） - Seiko Epson Corp

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S1R72U16

Allows USB devices to be controlled as IDE devices

Seiko Epson Corp 

4. Functions

4. Functions

4.1 Main CPU I/F

This LSI can be used as either of the following connections to the main CPU.

• IDE bus connection (interface voltage: 3.3 V)

• CPU bus connection (interface voltage: 1.8 V to 3.3 V)

Bus connection is selected by using the mode setting pin CPUxIDE (PORT02).

4.1.1

IDE Device Controller

This block operates when IDE bus connection is selected. It supports ATA/ATAPI-6.

• PIO transfer modes 0 to 4

• Multi Word DMA transfer modes 0 to 2

• Ultra DMA transfer modes 0 to 5

4.1.2

CPUIF

This block operates when CPU bus connection is selected. The registers used to control

this LSI are ATA task file registers. It supports PIO and DMA (*) transfer.

* For DMA transfer, the main CPU must provide a DMA master function that complies

with the DMA specifications of this LSI.

4.2 USB Host

The USB host function complies with the USB 2.0 (Universal Serial Bus Specification Revision 2.0)

standards. It supports HS (480 Mbps) and FS (12 Mbps) speed modes. USB host function is

controlled by the Bridge Sequencer block inside the LSI. USB devices that can be connected to this

LSI are bulk-only transport mass storage class devices (e.g., USB memory) and HUB devices.

4.3 GPI

These are the mode setting pins for selecting the command system, number of connected devices, and

interface to the main CPU.

For detailed information, see the S1R72U16 Technical Manual.

4.4 GPO

These pins are used to issue notification of USB storage device connections, internal PLL operation

status, and NSF (No Silent Failure).

For detailed information, see the S1R72U16 Technical Manual.

S1R72U16 Data Sheet (Rev. 2.00)

EPSON

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