SST27SF010 查看數據表（PDF） - Silicon Storage Technology
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SST27SF010
Silicon Storage Technology
SST27SF010 Datasheet PDF : 26 Pages
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256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit Multi-Purpose Flash
SST27SF256 / SST27SF512 / SST27SF010 / SST27SF020
Data Sheet
TABLE 14: PROGRAM/ERASE CYCLE TIMING PARAMETERS FOR SST27SF256
Symbol Parameter
Min
TAS
Address Setup Time
1
TAH
Address Hold Time
1
TPRT
VPP Pulse Rise Time
50
TVPS
VPP Setup Time
1
TVPH
VPP Hold Time
1
TPW
CE# Program Pulse Width
20
TEW
CE# Erase Pulse Width
100
TDS
Data Setup Time
1
TDH
Data Hold Time
1
TVR
VPP and A9 Recovery Time
1
TART
A9 Rise Time to 12V during Erase
50
TA9S
A9 Setup Time during Erase
1
TA9H
A9 Hold Time during Erase
1
TABLE 15: PROGRAM/ERASE CYCLE TIMING PARAMETERS FOR SST27SF512
Symbol Parameter
Min
TAS
Address Setup Time
1
TAH
Address Hold Time
1
TPRT
OE#/VPP Pulse Rise Time
50
TVPS
OE#/VPP Setup Time
1
TVPH
OE#/VPP Hold Time
1
TPW
CE# Program Pulse Width
20
TEW
CE# Erase Pulse Width
100
TDS
Data Setup Time
1
TDH
Data Hold Time
1
TVR
OE#/VPP and A9 Recovery Time
1
TART
A9 Rise Time to 12V during Erase
50
TA9S
A9 Setup Time during Erase
1
TA9H
A9 Hold Time during Erase
1
TABLE 16: PROGRAM/ERASE CYCLE TIMING PARAMETERS FOR SST27SF010/020
Symbol Parameter
Min
TCES
CE# Setup Time
1
TCEH
CE# Hold Time
1
TAS
Address Setup Time
1
TAH
Address Hold Time
1
TPRT
VPP Pulse Rise Time
50
TVPS
VPP Setup Time
1
TVPH
VPP Hold Time
1
TPW
PGM# Program Pulse Width
20
TEW
PGM# Erase Pulse Width
100
TDS
Data Setup Time
1
TDH
Data Hold Time
1
TVR
A9 Recovery Time for Erase
1
TART
A9 Rise Time to 12V during Erase
50
TA9S
A9 Setup Time during Erase
1
TA9H
A9 Hold Time during Erase
1
©2001 Silicon Storage Technology, Inc.
11
Max
30
500
Units
µs
µs
ns
µs
µs
µs
ms
µs
µs
µs
ns
µs
µs
T14.0 502
Max
30
500
Units
µs
µs
ns
µs
µs
µs
ms
µs
µs
µs
ns
µs
µs
T15.0 502
Max
30
500
Units
µs
µs
µs
µs
ns
µs
µs
µs
ms
µs
µs
µs
ns
µs
µs
T16.0 502
S71152-02-000 5/01 502
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