SST48CF008 查看數據表（PDF） - Silicon Storage Technology

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SST48CF008

CompactFlash Card

Silicon Storage Technology 

CompactFlash Card

SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256

Data Sheet

TABLE 2-2: SIGNAL DESCRIPTION (CONTINUED) (3 OF 4)

Symbol

Type1

Pin

Name and Functions

-OE

I

(PC Card Memory Mode)

9

This is an Output Enable strobe generated by the host interface. It is

used to read data from the CompactFlash card in Memory Mode and

to read the CIS and configuration registers.

-OE

(PC Card I/O Mode)

In PC Card I/O Mode, this signal is used to read the CIS and configu-

ration registers.

-ATA SEL

(True IDE Mode)

To enable True IDE Mode this input should be grounded by the host.

RDY/-BSY

O

PC Card Memory Mode)

37

In Memory Mode this signal is set high when the CompactFlash Card

is ready to accept a new data transfer operation and held low when

the card is busy. The Host memory card socket must provide a pull-

up resistor.

At power up and at Reset, the RDY/-BSY signal is held low (busy)

until the CompactFlash card has completed its power up or reset

function. No access of any type should be made to the Compact-

Flash card during this time. The RDY/-BSY signal is held high (dis-

abled from being busy) whenever the following condition is true: The

CompactFlash Card has been powered up with +RESET continu-

ously disconnected or asserted.

-IREQ

PC Card I/O Mode)

I/O Operation - After the CompactFlash card has been configured for

I/O operation, this signal is used as -Interrupt Request. This line is

strobed low to generate a pulse mode interrupt or held low for a level

mode interrupt.

INTRQ

(True IDE Mode)

In True IDE Mode signal is the active high Interrupt Request to the

host.

-REG

I

(PC Card Memory Mode)

44

This signal is used during Memory Cycles to distinguish between

Common Memory and Register (Attribute) Memory Attribute Memory

Select accesses. High for Common Memory, Low for Attribute Mem-

ory.

-REG

PC Card I/O Mode)

The signal must also be active (low) during I/O Cycles when the I/O

address is on the Bus.

-REG

(True IDE Mode)

RESET

I

(PC Card Memory Mode)

In True IDE Mode this input signal is not used and should be con-

nected to VDD by the host.

41

When the pin is high, this signal Resets the CompactFlash Card. The

CompactFlash card is Reset only at power up if this pin is left high or

open from power-up. The CompactFlash card is also Reset when the

Soft Reset bit in the Card Configuration Option Register is set.

RESET

(PC Card I/O Mode)

This signal is the same as the PC Card Memory Mode signal.

-RESET

(True IDE Mode)

In the True IDE Mode this input pin is the active low hardware reset

from the host.

VDD

-

(PC Card Memory Mode)

13,38

+5.0V, +3.3V power.

VDD

(PC Card I/O Mode)

This signal is the same for all modes.

VDD

(True IDE Mode)

This signal is the same for all modes.

©2001 Silicon Storage Technology, Inc.

11

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