UPD77113A 查看數據表（PDF） - NEC => Renesas Technology

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UPD77113A

16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS

NEC => Renesas Technology 

µPD77113A, 77114

• External data memory interface (µPD77114 only)

Pin Name

X/Y

Pin No.

100-pin TQFP 80-pin BGA

99

−

DA0 - DA12 16 - 4

−

D0 - D15

34 - 27, 24 - 17

−

MRD

97

−

MWR

96

−

HOLDRQ

92

−

BSTB

94

−

HOLDAK

93

−

I/O

Function

Shared by:

Output Memory select signal output.

−

(3S)

0: Uses X memory.

1: Uses Y memory.

Output Address bus of external data memory.

−

(3S) • Accesses the external memory.

• Continuously outputs the external memory

address accessed last when the external

memory is not being accessed. Kept low

(0x000) if the external memory is never

accessed after reset.

I/O 16-bit data bus.

−

(3S) • Accesses the external memory.

Output Read output

−

(3S) • External memory read

Output Write output

−

(3S) • External memory write

Input Hold request signal

−

• Input a low level to this pin when the external

device uses the external data memory bus of

the µPD77114.

Output Bus strobe signal

−

• This pin goes low when the µPD77114 uses

the external data memory bus.

Output Hold acknowledge signal

−

• This pin goes low when the external device

is enabled to use the external data memory

bus of the µPD77114.

Remark Pins marked “3S” under the heading “I/O” go into a high-impedance state in the following conditions:

X/Y, DA0-DA12, MRD, MWR: When the bus is released (HOLDAK = low level)

D0-D15: When the external data memory is not being accessed and when the bus is released

(HOLDAK = low level)

Data Sheet U14373EJ3V0DS

11

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