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V436616Y24VXTG-10PC 查看數據表(PDF) - Mosel Vitelic Corporation

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V436616Y24VXTG-10PC
Mosel-Vitelic
Mosel Vitelic Corporation  Mosel-Vitelic
V436616Y24VXTG-10PC Datasheet PDF : 12 Pages
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MOSEL VITELIC
V436616Y24V
AC Characteristics
TA = 0° to 70°C; VSS = 0V; VCC = 3.3V ± 0.3V, tT = 1 ns (Continued)
Limit Values
-75PC
-75
# Symbol Parameter
Min. Max. Min. Max.
14
tRP
Row Precharge Time
15
20
15
tRAS
Row Active Time
42
100K
45
100K
16
tRC
Row Cycle Time
60
60
17
tRRD
Activate(a) to Activate(b) Command Pe- 14
15
riod
18
tCCD
CAS(a) to CAS(b) Command Period
1
1
Refresh Cycle
19
tREF
20
tSREX
Read Cycle
Refresh Period (8192 cycles)
Self Refresh Exit Time
64
64
10
10
21
tOH
22
tLZ
23
tHZ
24
tDQZ
Write Cycle
Data Out Hold Time
Data Out to Low Impedance Time
Data Out to High Impedance Time
DQM Data Out Disable Latency
3
3
1
1
3
7.5
3
7.5
2
2
25
tWR
Write Recovery Time
26
tDQW
DQM Write Mask Latency
2
2
0
0
-10PC
Min. Max.
20
45
100K
70
20
1
64
10
3
1
3
10
2
2
0
Unit
ns
ns
ns
ns
CLK
ms
ns
ns
ns
ns
CLK
CLK
CLK
Note
6
6
6
6
2
7
Notes:
1.The specified values are valid when addresses are changed no more than once during tCK(min.) and when No
Operation commands are registered on every rising clock edge during tRC(min). Values are shown per module
bank.
2. The specified values are valid when data inputs (DQ’s) are stable during tRC(min.).
3. All AC characteristics are shown for device level.
An initial pause of 100 µs is required after power-up, then a Precharge All Banks command must be given followed
by 8 Auto Refresh (CBR) cycles before the Mode Register Set Operation can begin.
4. AC timing tests have VIL = 0.4V and VIH = 2.4V with the timing referenced to the 1.4V crossover point. The transition
time is measured between VIH and VIL. All AC measurements assume tT = 1 ns with the AC output load circuit
shown. Specific tac and toh parameters are measured with a 50 pF only, without any resistive termination and a
input signal of 1V / ns edge rate between 0.8V and 2.0V.
V436616Y24V Rev. 1.0 January 2002
8

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