VSC7217UC 查看數據表（PDF） - Vitesse Semiconductor
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VSC7217UC Datasheet PDF : 36 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Datasheet
VSC7217
Multi-Gigabit Interconnect Chip
8B/10B Encoder
Each channel contains an 8B/10B encoder which translates the 8-bit input data on Tn(7:0) into a 10-bit
encoded data character. C/Dn inputs are also provided in each channel which, along with KCHAR, allow the
transmission of special Fibre Channel Kxx.x characters (see Table 2). Note that KCHAR is a static input, and
does NOT have the same input timing as Tn(7:0), C/Dn and WSENn. Normally, C/Dn is LOW in order to
transmit data. If C/Dn is HIGH and KCHAR is LOW, a Fibre Channel defined IDLE Character (K28.5 =
‘0011111010’ or ‘1100000101’ depending on disparity) is transmitted and Tn(7:0) is ignored. If C/Dn is HIGH
and KCHAR is HIGH, a Kxx.x character is transmitted as determined by the data pattern on Tn(7:0). See
Table 3. Data patterns other than those defined in Table 3 produce undefined 10B encodings.
Table 2: Transmit Data Controls
WSENn
0
0
0
1
C/Dn
0
1
1
X
KCHAR
X
0
1
X
Encoded 10-bit Output
Data Character
IDLE Character (K28.5)
Special Kxx.x Character
16-Character Word Sync Sequence
Table 3: Special Characters (Selected when C/Dn and KCHAR are HIGH)
Code
K28.0
K28.1
K28.2
K28.3
K28.4
K28.5
K28.5+
Tn(7:0)
000 11100
001 11100
010 11100
011 11100
100 11100
101 11100
101 01100
Comment
User Defined
User Defined
User Defined
User Defined
User Defined
IDLE
User Defined
Code
K28.5-
K28.6
K28.7
K23.7
K27.7
K29.7
K30.7
Tn(7:0)
101 01101
110 11100
111 11100
111 10111
111 11011
111 11101
111 11110
Comment
User Defined
User Defined
Test Only
User Defined
User Defined
User Defined
User Defined
Encoder Bypass Mode
When ENDEC is LOW, the 8B/10B encoders are bypassed and a 10-bit input character Tn(7:0) is serial-
ized directly in each channel, with bit Tn0 transmitted first. The C/Dn input becomes Tn8 and WSENn
becomes Tn9. The KCHAR input becomes ENCDET which is not used in the transmitter but, when HIGH,
enables Comma detection in all four receivers. Refer to the “Decoder Bypass Mode” section for a description of
this mode of operation in the receiver. The latency through the transmitter is reduced by one character time
when ENDEC is LOW. This mode of operation is similar to a 10-bit interface commonly found in serializer/
deserializers for the Fibre Channel (VSC7125) and Gigabit Ethernet (VSC7135) markets.
Word Sync Generation
The VSC7217 can perform channel alignment (also referred to as “word alignment” or “word sync”). In
other words, the four receive data output streams are aligned such that the same 4-byte word presented to the
G52325-0, Rev. 3.0
6/14/00
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
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