VSC835UB 查看數據表（PDF） - Vitesse Semiconductor
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VSC835UB Datasheet PDF : 18 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
2.5 Gbits/sec
34x34 Crosspoint Switch with Signal Detection
Datasheet
VSC835
Table 4: Programming Port Interface Timing
Parameter
Description
Tconfig
TpdADDR
TpdRDB
Tpdint
Tpdstate
TsRDB
ThRDB
TsWRB
ThWRB
TsCONFIG
TsCSB
TpwCONFIG
TpwWRB
TpwRDB
TtsDATA
Switch configuration delay
Data read propagation delay from ADDR
Data read propagation delay from RDB (1)
Interrupt propagation delay from MONCLK (2)
MONCLK to internal state register change delay (2)
ADDR to RDB setup time
RDB to ADDR hold time
WRB setup time (for either ADDR or DATA)
WRB hold time (for either ADDR or DATA)
WRB to CONFIG setup time
CSB setup time (to either WRB or RDB)
CONFIG pulse width (high)
WRB pulse width (low and high)
RDB pulse width (low and high)
DATA tri-state delay (from either RDB or CSB) (2)
note 1: measured from falling edge.
note 2: measured from rising edge.
Min
Max
Units
-
6
ns
-
30
ns
-
7
ns
-
50
ns
-
6
ns
5
-
ns
3
-
ns
5
-
ns
3
-
ns
1
-
ns
0
-
ns
10
-
ns
10
-
ns
10
-
ns
-
10
ns
DC Characteristics (over the specified operating conditions)
Table 5: Power
Parameter
Description
(Max)
ICC
PT
ITERM-V
ITERM-E
VCC supply current
Total chip power
VTERM supply current with VTERM =VCC-1.3V
VTERM supply current with VTERM =VCC-2.0V
4060
14
~0
-950
Note: Icc Specified with outputs terminated with 50 ohms to +2.0V and Chip Vterm=+2.0V, Vcc = 3.45V
Units
mA
W
mA
mA
Page 6
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52270-0, Rev. 4.1
7/24/00
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