VSC8114QB 查看數據表（PDF） - Vitesse Semiconductor

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VSC8114QB

ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery

Vitesse Semiconductor 

Data Sheet

VSC8114

VITESSE

SEMICONDUCTOR CORPORATION

ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux

with Integrated Clock Generation and Clock Recovery

Clock Recovery Unit

Table 10: Reference Frequency for the CRU

CRUREFSEL

1

0

REFSEL

CRUREFCLK

Frequency

[MHz]

Output

Frequency

[MHz]

X

77.76 ± 500ppm

622.08

Uses CMU’s Reference Clock (See Table 11 below)

Clock Multiplier Unit

Table 11: Reference Frequency Selection and Output Frequency Control

REFSEL

1

0

Reference

Frequency

[MHz]

19.44

77.76

Output

Frequency

[MHz]

622.08

622.08

Table 12: Clock Multiplier Unit Performance

Name

RCd

RCj

RCj

RCf

OCj

OCj

OCfrange

Description

Reference clock duty cycle

Reference clock jitter (RMS) @ 77.76 MHz ref (1)

Reference clock jitter (RMS) @ 19.44 MHz ref (1)

Reference clock frequency tolerance (2)

TXDATAOUT+/- jitter (RMS) @ 77.76 MHz ref (3)

TXDATAOUT+/- jitter (RMS) @ 19.44 MHz ref (3)

Output frequency (alternating 10 pattern)

Min

Typ

Max

Units

40

60

%

13

ps

5

ps

-20

+20

ppm

8

ps

15

ps

620

624

Mb/s

(1) These Reference Clock Jitter limits are required for the outputs to meet SONET system level jitter requirements

(< 10 mUIrms)

(2) Needed to meet SONET output frequency stability requirements

(3) Measured

Note: Jitter specification is defined utilizing a 12KHz - 5MHz LP-HP single pole filter.

G52185-0, Rev 4.0

11/1/99

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

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