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VSC8166 查看數據表(PDF) - Vitesse Semiconductor

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VSC8166 Datasheet PDF : 16 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Datasheet
VSC8166
2.488 Gbit/sec
1:16 SONET/SDH Demux with Clock Recovery
Table 1: AC Characteristics
Parameters
tpdd
tpd32
tDR, tDF
tCLKR, tCLKF
tCLKR32,
tCLKF32
CLK16OD
Description
Data valid from falling
edge of CLK16O+
CLK32O transition from
falling edge of CLK16O+
D[15:0]+/- rise and fall
times
CLK16O+/- rise and fall
times
CLK32O+/- rise and fall
times
CLK16O+/- duty cycle
distortion
Min Max Units
0
1.0
ns
Conditions
0
1.0
ns
20% to 80% into 50 Ohm load
400
ps See Figure 7
20% to 80% into 50 Ohm load
400
ps See Figure 7
20% to 80% into 50 Ohm load
400
ps See Figure 7
% of
45
55 clock
cycle
Table 2: DC Characteristics (Over recommended operating conditions).
Parameters
Description
Min Typ Max Units
Conditions
VOH
PECL output high
voltage
VCC-1.02
VOL
PECL output low voltage
VCC-
2.00
VCC-0.70
V
50Termination to VCC -
2.0V, See Figure 7
VCC-1.62
V
50Termination to VCC -
2.0V, See Figure 7
Low speed output
VOLVPECL voltage differential peak-
400
to-peak swing.
1200
mV
50Termination to VCC -
2.0V, See Figure 7
VIHS
VCMI
Serial input differential
(DI+/-)
Serial input common
mode voltage
400
VCC-1.5
1200
VCC-0.5
AC Coupled, internally
mV biased to (VCC+VEE)/2
V
VCC
Supply voltage
PD
Power dissipation
IDD
Supply Current
3.14
3.47
V 3.3V± 5%
Outputs open,
1.7
2.3
W VCC = 3.45V
Outputs open,
525
660
mA VCC = 3.45V
G52252-0, Rev. 3.0
11/9/99
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 7

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