DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

WED2ZL361MV 查看數據表(PDF) - White Electronic Designs Corporation

零件编号
产品描述 (功能)
生产厂家
WED2ZL361MV
WEDC
White Electronic Designs Corporation WEDC
WED2ZL361MV Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
White Electronic Designs
WED2ZL361MV
1Mx36 Synchronous Pipeline Burst NBL SRAM
FEATURES
Fast clock speed: 166, 150, 133, and 100MHz
Fast access times: 3.5ns, 3.8ns, 4.2ns, and 5.0ns
Fast OE# access times: 3.5ns, 3.8ns, 4.2ns, and
5.0ns
Single +3.3V ± 5% power supply (VCC)
Snooze Mode for reduced-standby power
Individual Byte Write control
Clock-controlled and registered addresses, data
I/Os and control signals
Burst control (interleaved or linear burst)
Packaging:
• 119-bump BGA package
Low capacitive bus loading
This product is subject to change without notice.
DESCRIPTION
The WEDC SyncBurst — SRAM family employs high-
speed, low-power CMOS designs that are fabricated
using an advanced CMOS process. WEDC’s 32Mb
SyncBurst SRAMs integrate two 1M x 18 SRAMs into a
single BGA package to provide 1M x 36 configuration. All
synchronous inputs pass through registers controlled by
a positive-edge-triggered single-clock input (CLK). The
NBL or No Bus Latency Memory utilizes all the bandwidth
in any combination of operating cycles. Address, data
inputs, and all control signals except output enable and
linear burst order are synchronized to input clock. Burst
order control must be tied “High or Low.” Asynchronous
inputs include the sleep mode enable (ZZ). Output Enable
controls the outputs at any given time. Write cycles are
internally self-timed and initiated by the rising edge of the
clock input. This feature eliminates complex off-chip write
pulse generation and provides increased timing flexibility
for incoming signals.
FIGURE 1 – PIN CONFIGURATION
(Top View)
Block Diagram
1
2
3
4
5
6
7
A
VCC
SA
SA
SA
SA
SA VCC
B
SA CE2 SA ADV# SA CE2# NC
C
NC SA SA VCC SA SA
NC
D DQC DQPC VSS NC VSS DQPB DQB
E DQC DQC VSS CE1# VSS DQB DQB
F
VCC DQC VSS OE# VSS DQB VCC
G DQC DQC BWC# SA BWB# DQB DQB
H DQC DQC VSS WE# VSS DQB DQB
J
VCC
VCC
NC
VCC
NC
VCC
VCC
K DQD DQD VSS CLK VSS DQA DQA
L DQD DQD BWD# NC BWA# DQA DQA
M
VCC DQD VSS CKE# VSS DQA VCC
N DQD DQD VSS SA1 VSS DQA DQA
P DQD DQPD VSS SA0 VSS DQPA DQA
R
NC SA LBO VCC NC SA
NC
T
NC NC SA SA SA NC ZZ
U
VCC NC NC
NC
NC NC VCC
CLK
CKE#
ADV#
LBO#
CE1#
CE2
CE2#
OE#
WE#
ZZ
1M x 18
CLK
CKE#
ADV#
LBO#
CS1#
CS2
CS2#
OE#
WE#
ZZ
1M x 18
CLK
CKE#
ADV#
LBO#
CS1#
CS2
CS2#
OE#
WE#
ZZ
Address Bus
(SA0 - SA19)
DQc, DQd
DQPc, DQPd
DQa, DQb
DQPa, DQPb
DQa - DQd
DQPa - DQPd
June 2004
Rev. 3
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]