ADP5020(RevA) 查看數據表（PDF） - Analog Devices
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ADP5020 Datasheet PDF : 28 Pages
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Data Sheet
ADP5020
POWER-ON SEQUENCE USING THE I2C INTERFACE
When the EN pin is low, the regulator sequence is controlled by
the application processor sending I2C commands to control the
activation. When Bit 4 (EN_ALL) in the REG_CONTROL_
STATUS register (Address 0x03) is set to 1, the regulator sequence
is as follows:
1. Buck 1
2. LDO
3. Buck 2
This sequence can be factory programmed through fuses.
Unused regulators can also be fuse programmed to be turned
off during sequencing.
VDDx
POR
VUVLOR
<50µs
VUVLOF
INTERNAL
POR
EN
I2C BUS
BUCK 1
LDO
BUCK 2
I2C SET/CLEAR
xxx_XSHTDN BITS
tREG1
tREG2
tREG3
tXSHTDN
XSHTDN
Figure 25. Activation and Power Failure Conditions
EN
I2C BUS
BK1_EN
=1
LD0_EN
=1
BK2_EN
=1
FORCE_XS
=1
FORCE_XS
=0
BK1_EN,
LDO_EN,
BK2_EN = 0
BUCK 1
LDO
BUCK 2
XSHTDN
Figure 26. Individual Activation Through I2C Commands
Rev. A | Page 19 of 28
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