HDMP-1512 查看數據表（PDF） - HP => Agilent Technologies

零件编号

产品描述 (功能)

生产厂家

HDMP-1512

Fibre Channel Transmitter and Receiver Chipset

HP => Agilent Technologies 

HDMP-1512 (Tx), Signal Definitions

Symbol

CAP0[A:B]

CAP1[A:B]

-COMGEN

-ECLKSEL

EWRAP

FAULT

GND_A

GND_LOG

GND_LZ

GND_LZHS

GND_TTL

± LOUT

LZBTP

LZCSE

LZDC

± LZOUT

LZMDF

-LZON

Signal Name

Loop Filter Capacitor

Pins [79,80]

Loop Filter Capacitor

Pins [1,2]

Comma Generate

Pin [32]

External Clock Select

Pin [69]

Enable Wrap

Pin [71]

Laser Fault Indicator

Pin [29]

Analog Ground

Pins [3,4]

Logic Ground

Pins [31,35,70,74]

Laser Ground

Pins [25,26]

Laser High Speed

Ground

Pins [10,18]

TTL Ground

Pins [39,40,65,66]

Local Serial Data

Pins [8,9]

Laser Bandgap Test

Point

Pin [28]

Laser Current Source

Emitter

Pin [14]

Laser DC Drive

Pin [21]

Laser Driver Serial

Output

Pins [19,20]

Laser Monitor Diode

Feedback

Pin [22]

Laser Control and

Reset

Pin [30]

I/O

C

C

Input

Input

Input

Output

S

S

S

Logic Type

TTL

TTL

TTL

TTL

Description

PLL filter capacitor should be connected from pins

79 and 80 to pins 1 and 2 (typical value = 0.01 µF).

See Figures 18, 19, 20, and 21.

PLL filter capacitor should be connected from pins

79 and 80 to pins 1 and 2 (typical value = 0.01 µF).

See Figures 18, 19, 20, and 21.

An active low input, causes the transmitter to

internally generate the positive disparity K28.5 byte

(0011111010) for transmission.

An active low input, selects the TBC inputs to be used

as the serial clock, bypassing the PLL. Used mainly

for testing.

Works in conjunction with TS1 and TS2 to specify

input and output ports.

Indicates the laser output level has moved outside of

the window detector set boundary and the laser test

capacitor (LZTC) has discharged to a fault level. This

output is reset by the -LZON pin.

Normally 0 volts. Used to provide a clean ground plane

for the critical PLL and high speed analog cells.

Normally 0 volts. Used for all internal PECL logic.

Should be completely isolated from the noisy TTL

ground.

Normally 0 volts. Used for all laser circuitry.

S

Normally 0 volts.

S

Output BLL

C

C

C

C

C

Input

TTL

Normally 0 volts. Used for all TTL I/O buffer cells.

High speed data port, typically connected to the ± LIN

port on the local receiver during serial wrap mode.

This pin is internally set to 2.3 VDC and normally

should connect to one terminal of the laser DC bias

resistor (pot1 Figure 3).

Used to set the bias current of the AC laser driver.

Typical use is shown in Figure 3 where pot2 is used to

set the laser modulation depth.

Used to control the laser diode DC bias (Figure 3).

AC driver to the laser diode. The outputs should be AC

coupled to the laser bias circuit.

Connects to the laser monitor diode and one terminal of

the laser DC bias resistor (pot1). Under normal

operating conditions, the voltage on this pin will

be 1.85 V.

The laser diode is turned on (active low) or off (high)

with this input. In the off state the capacitor on pin

LZTC charges, resetting the window

detector (Figure 3).

669

Share Link: