DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

HDMP-1512 查看數據表(PDF) - HP => Agilent Technologies

零件编号
产品描述 (功能)
生产厂家
HDMP-1512
HP
HP => Agilent Technologies HP
HDMP-1512 Datasheet PDF : 26 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
HDMP-1514 (Rx), Signal Definitions (cont’d.)
Symbol
DR_REF
EN_CDET
-EQEN
EWRAP
GND_A
GND_HS
GND_LOG
GND_TTL
GND_TTLA
-LCK_REF
L_UNUSE
± LIN
LOLA
LOLB
N_RXTEMP
P_RXTEMP
-POR
Signal Name
Receiver Reference
Pin [21]
Enable Comma Detect
Pin [38]
I/O
C
Input
Equalizer Enable Input
Pin [32]
Enable Wrap
Pin [71]
Input
Input
Analog Ground
Pins [3,4]
High Speed Ground
Pins [14,25,26]
Logic Ground
Pins[31,35,70,74]
TTL Ground
Pins [39,40,65,66]
TTL Ground
Pin [9]
Lock to Reference
Pin [36]
S
S
S
S
S
Input
Link Unusable
Pin [73]
Input
Local Serial Data
Pins [16,17]
Loss of Light
Signal
Pin [28]
Input
Output
Loss of Light
Signal
Pin [29]
Output
Temperature Monitor
Pin [6]
Temperature Monitor
Pin [8]
Power on Reset
Pin [27]
C
C
Output
Logic Type
TTL
TTL
TTL
TTL
TTL
H50
TTL
TTL
TTL
Description
This node is used to set the peak-to-peak signal level
of the loss of light detection circuitry.
When high, the receiver will reset internal clocks and
registers when an incoming comma character (K28.5)
of positive disparity (0011111xxx) is detected. When
low, clocks and registers will not reset and the comma
detect output is disabled. Comma detect is also disabled
whenever -LCK_REF is set low.
When set low, the internal cable equalizer amplifier on
the ± DI lines is enabled.
When set high, the high speed data is taken from the
± LIN port, enabling the data input from the local
transmitter. When this input is set low, the high speed
input is taken from the ± DI lines.
Normally 0 volts. Used to provide a clean ground plane
for the critical PLL and high speed analog cells.
Normally 0 volts.
Normally 0 volts. Used for all internal PECL logic.
Should be completely isolated from the noisy TTL
ground.
Normally 0 volts. Used for all TTL I/O buffer cells.
Normally 0 volts.
A low input causes the internal PLL to acquire
frequency lock on the external reference signal applied
at CLKIN. To assure lock, this pin should be held low
for at least 500 µsec and held high at all other times. A
low input disables the comma detect function.
Typically supplied from open fiber control circuitry.
Used in conjunction with EWRAP and -LCK_REF to
keep the internal Vco near operational frequency,
optimizing frequency lock times.
High speed data port, typically connected to the ± LOUT
port on the local transmitter when in serial wrap mode.
A high signal on this pin indicates the amplitude of
the input serial data has fallen below a preset level
(see DR_REF) or no transitions have been detected
within 4 cycles of TBC.
A high signal on this pin indicates the amplitude of
the input serial data has fallen below a preset level
(see DR_REF) or no transitions have been detected
within 4 cycles of TBC.
Used in conjunction with pin 8 (P_RXTEMP) to
monitor the on-chip temperature diode (Cathode.)
Used in conjunction with pin 6 (N_RXTEMP) to
monitor the on-chip temperature diode (Anode.)
Active low output. Monitors the power supply voltage
on startup to assure VCC is at the proper DC level.
673

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]