SST89E554 查看數據表（PDF） - Silicon Storage Technology

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SST89E554

Flash flex 51 MCU

Silicon Storage Technology 

FlashFlex51 MCU

SST89E564 / SST89V564 / SST89E554 / SST89V554

3.0 MEMORY ORGANIZATION

Preliminary Specifications

The device has separate address spaces for program and

data memory.

3.1 Program Memory

There are two internal flash memory blocks in the device.

The primary flash memory block (Block 0) has 64/32

KByte. The secondary flash memory block (Block 1) has 8

KByte. Since the total program address space is limited to

64/32 KByte, the SFCF[1:0] bit are used to control Program

Bank Selection. Please refer to Figure 3-1 and Figure 3-2

for the program memory configurations. Program Bank

Select is described in the next section.

The 64K/32K x8 primary SuperFlash block is organized as

512/256 sectors, each sector consists of 128 Bytes.

The 8K x8 secondary SuperFlash block is organized as 64

sectors, each sector consists also of 128 Bytes.

For both blocks, the 7 least significant program address bits

select the byte within the sector. The remainder of the pro-

gram address bits select the sector within the block.

FFFFH

EA# = 0

EA# = 1

SFCF[1:0] = 00

FFFFH

EA# = 1

SFCF[1:0] = 01, 10, 11

FFFFH

External

64 KByte

56 KByte

Block 0

64 KByte

Block 0

2000H

1FFFH

8 KByte

Block 1

0000H

0000H

0000H

384 ILL F48.5

FIGURE 3-1: PROGRAM MEMORY ORGANIZATION FOR SST89E564 AND SST89V564

©2001 Silicon Storage Technology, Inc.

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S71181-03-000 9/01 384

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