SIW3500GIG1 查看數據表（PDF） - RF Micro Devices
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SIW3500GIG1 Datasheet PDF : 18 Pages
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SiW3500
Preliminary
Name
Pad Type
Ball
Description
UART Interface (Power from VDD_P_ALT)
UART_RXD
CMOS input
G3
UART_TXD
CMOS output
L4
UART_CTS
CMOS input
H2
UART_RTS
CMOS output
H1
EXT_WAKE
CMOS input
C5
UART receive data.
UART transmit data.
UART flow control clear to send.
UART flow control ready to send.
Wake up signal from host.
External Memory Interface (power from VDD_P)
A[17]
A[16]
A[15]
A[14]
A[13]
A[12]
A[11]
A[10]
A[9]
A[8]
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
E11
J11
L5
F11
B8
K6
L7
A10
CMOS output
H11
A11
B11
K9
K7
C10
K10
D10
L11
D[15]
D[14]
D[13]
D[12]
D[11]
D[10]
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
A9
C9
B10
E10
K5
G11
G10
CMOS bi-directional
H9
K4
J9
K8
J6
J5
F9
J4
H10
OE_N
CMOS output
L10
WE_N/EEPROM_WP CMOS output
A8
FCS_N
CMOS output
J10
Address lines.
Note: A[17] and A[16] can be used to support an optional external serial
EEPROM when using the internal ROM in place of the external Flash
memory.
Data lines.
Note: Connect D[9] to D[10] to use internal ROM.
Output enable for external memory (active low).
Write enable for external memory (active low).
Chip select for external memory (active low).
Power and Ground
VBATT_ANA
Power
VBATT_DIG
Power
VCC_OUT
Power
VDD_P
Power
VDD_C
Power
D3
Positive supply to internal analog voltage regulator.
L9
Positive supply to internal digital voltage regulator.
D1
Regulated output from internal analog voltage regulator.
D11
K11
Positive supply for external memory interface and some digital I/Os.
C11
L8
Positive supply for digital circuitry or output of internal digital voltage.
Table 1. SiW3500 Radio Processor Pin List (Continued)
14-44
60 0066 R00Hrf SiW3500 Radio Processor DS
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