AU5783(2001) 查看數據表（PDF） - Philips Electronics

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AU5783
(Rev.:2001)

J1850/VPW transceiver with supply control function

Philips Electronics 

Philips Semiconductors

J1850/VPW transceiver with supply control function

Preliminary specification

AU5783

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX. UNIT

Pin BUS

VBOh_n

BUS output high voltage in normal mode

VBOh_h

VBOhl

BUS output high voltage in high speed

mode

BUS voltage; low battery

–IBO.LIM

–IBO.LK1

BUS short circuit current

BUS leakage current; passive state

–IBO.LK0,

–IBO.LK5

–IBO.LKLB0,

–IBO.LKLB5

–ILOG

VBih

BUS current with loss of battery

BUS leakage current; loop back mode

BUS leakage current at loss of ground

BUS input high voltage

TX = 5 V, 4X/LOOP = 0 V;

8 V < VBAT < 16 V

250 Ω < RL < 1.6 kΩ; Note 3

TX = 5 V, 4X/LOOP = 5 V;

8 V < VBAT < 16 V

250 Ω < RL < 1.6 kΩ; Note 3

TX = 5 V; Note 3

5.5 V<VBAT < 8 V;

250 Ω < RL < 1.6 kΩ

TX = 5 V; VBUS = –2 V

TX = 0 V; 0 V < VBAT < 16 V;

–2 V < VBUS < +9 V

VBAT < 2 V; –2 V < VBUS < +9 V

6.7

6.7

VBAT–1.3

30

–100

–100

TX = 0 V or 5 V; 0 V<VBAT<16 V;

–2 V < VBUS < +9 V

0 V < VBAT < 16 V; see test circuit

5.8 V < VBAT < 16 V,

4X/LOOP = 5 V and

4X/LOOP = 0 V

–100

–20

4.2

8.0

V

9.0

V

VBAT

V

100

mA

+100

µA

+100

µA

+100

µA

+100

µA

V

VBil

BUS input low voltage

4X/LOOP = 5 V or

4X/LOOP = 0 V

3.4

V

VBhy

BUS input hysteresis

4X/LOOP = 5 V and

0.1

4X/LOOP = 0 V

0.5

V

VBih_l

BUS input high voltage at low battery

5.5 V < VBAT < 5.8 V,

VBAT –

V

4X/LOOP = 5 V and

1.6 V

4X/LOOP = 0 V

VBiL_L

BUS input low voltage at low battery

5.5 V < VBAT < 7 V,

4X/LOOP = 5 V and

4X/LOOP = 0 V

VBAT –

V

3.6 V

VBih_s

BUS input high voltage in standby and

sleep mode

VBil_s

BUS input low voltage in standby

and sleep mode

VBih_sl

BUS input high voltage in standby and

sleep mode at low battery

VBil_sl

BUS input low voltage in standby and

sleep mode at low battery

Pin LOAD

NSTB = 0 V,

4X/LOOP = 5 V and

4X/LOOP = 0 V,

6 V < VBAT < 16 V

NSTB = 0 V,

4X/LOOP = 5 V and

4X/LOOP = 0 V,

6 V < VBAT < 16 V

NSTB = 0 V,

4X/LOOP = 5 V and

4X/LOOP = 0 V ,

4.5 V < VBAT < 6 V

NSTB = 0 V,

4X/LOOP = 5 V and

4X/LOOP = 0 V ,

4.5 V < VBAT < 6 V

4.2

1/2 (VBAT +

2.4)

V

2.2

V

V

1/2 (VBAT – V

1.6)

Vld

Load output voltage

Ild = 2 mA

0.2

V

Vldoff

Load output voltage unpowered

Ild = 6 mA, VBAT = 0 V

1

V

NOTES:

1. TX = 0 V; NSTB = 0 V; 7 V < VBAT < 13 V; Tj < 125°C; –1 V < VBUS < 1 V; LWAKE connected to BAT via 10 kΩ; INH not connected.

2. This parameter is characterized but not subject to production test.

3. For VBAT < 8.3 V the bus output voltage is limited by the supply voltage.

For 16 V < VBAT < 27 V the load is limited by the package power dissipation ratings. The duration of the latter condition is recommended

to be less than 2 minutes.

4. For 3-State devices driving the 4X/LOOP Pin, the leakage in the 3-State output must be below the specified input current to ensure the pin is

biased in the center state to provide the loop back function. For 3-State devices driving the 4X/LOOP pin, the leakage in the 3-State output

must be below the specified input current to insure the pin is biased in the center state to provide the loop back function. If the leakage

current of the microcontroller is too high, then an alternate approach is to connect a resistor voltage divider between the VCC and ground of

the microcontroller’s supply to provide approximately 1.45 V bias on the 4X/LOOP pin.

2001 Feb 15

9

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