74LVC109D,118 查看數據表（PDF） - NXP Semiconductors.

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74LVC109D,118

Dual JK flip-flop with set and reset; positive-edge trigger

NXP Semiconductors. 

Philips Semiconductors

Dual JK flip-flop with set and reset;

positive-edge trigger

Product specification

74LVC109

DC CHARACTERISTICS

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

SYMBOL

PARAMETER

Tamb = −40 to 85 °C; note 1

VIH

HIGH-level input

voltage

VIL

LOW-level input

voltage

VOH

HIGH-level output

voltage

VOL

LOW-level output

voltage

ILI

ICC

∆ICC

input leakage current

quiescent supply

current

additional quiescent

supply current per

input pin

TEST CONDITIONS

OTHER

VCC (V)

VI = VIH or VIL

IO = −100 µA

IO = −12 mA

IO = −12 mA

IO = −24 mA

VI = VIH or VIL

IO = 100 µA

IO = 12 mA

IO = 24 mA

VI = 5.5 V or GND

VI = VCC or GND;

IO = 0 A

VI = VCC − 0.6 V;

IO = 0 A

1.2

2.7 to 3.6

1.2

2.7 to 3.6

2.7 to 3.6

2.7

3.0

3.0

2.7 to 3.6

2.7

3.0

3.6

3.6

2.7 to 3.6

MIN.

TYP.

VCC

−

2.0

−

−

−

−

−

VCC − 0.2 VCC

VCC − 0.5 −

VCC − 0.6 −

VCC − 0.8 −

−

GND

−

−

−

−

−

±0.1

−

0.1

−

5

MAX. UNIT

−

V

−

V

GND

V

0.8

V

−

V

−

V

−

V

−

V

0.2

V

0.4

V

0.55

V

±5

µA

10

µA

500

µA

2004 Mar 18

7

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