EN80960SA 查看數據表（PDF） - Intel

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EN80960SA

EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS

Intel 

80960SA

3.0 MECHANICAL DATA

3.1 Packaging

The 80960SA is available in two package types:

• 80-lead quad flat pack (EIAJ QFP). Shown in

Figure 15.

• 84-lead plastic leaded chip carrier (PLCC).

Shown in Figure 16.

Dimensions for both package types are given in the

Intel Packaging handbook (Order #240800).

3.2 Pin Assignment

The QFP and PLCC have different pin assignments.

The QFP pins are numbered in order from 1 to 80

around the package perimeter. The PLCC pins are

numbered in order from 1 to 84 around the package

perimeter. Tables 9 and 10 list the function of each

QFP pin; Tables 11 and 12 list the function of each

PLCC pin.

VCC and GND connections must be made to multiple

VCC and GND pins. Each VCC and GND pin must be

connected to the appropriate voltage or ground and

externally strapped close to the package. It is recom-

mended that you include separate power and ground

planes in your circuit board for power distribution.

Pins identified as NC (No Connect) should never be

connected.

VSS

ALE

READY

A31

A30

A29

A28

VSS

VCC

A27

A26

A25

VCC

VSS

A24

A23

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41

65

40

BE1

66

39

NC

67

38

A1

68

37

VSS

69

36

VCC

70

35

A2

71

x80960SA-20

34

A3

72

XXXXXXXX

33

VCC

73

XXXXXX

32

VSS

74

XXXXXX

31

D0

75

30

AD1

76

29

AD2

77

28

AD3

78

27

AD4

79

26

AD5

80

25

AD6

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Figure 15. 80-Lead EIAJ Quad Flat Pack (QFP) Package

NOTE:

To address the

package prefix

fact that many of the package

variables in this document are

prefix variables have changed,

now indicated with an "x".

a21ll

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