EN80C186EA25 查看數據表（PDF） - Intel

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EN80C186EA25

16-Bit High-Integration Embedded Processors

Intel 

Intel® 80C186XL and Intel® 80C186EA Differences

Table 4.

Pin Description Nomenclature

Symbol

P

G

I

O

I/O

S(E)

S(L)

A(E)

A(L)

H(1)

H(0)

H(Z)

H(Q)

H(X)

R(WH)

R(1)

R(0)

R(Z)

R(Q)

R(X)

I(1)

I(0)

I(Z)

I(Q)

I(X)

P(1)

P(0)

P(Z)

P(Q)

P(X)

Description

Power Pin (Apply +VCC Voltage)

Ground (Connect to VSS)

Input Only Pin

Output Only Pin

Input/Output Pin

Synchronous, Edge Sensitive

Synchronous, Level Sensitive

Asynchronous, Edge Sensitive

Asynchronous, Level Sensitive

Output Driven to VCC during Bus Hold

Output Driven to VSS during Bus Hold

Output Floats during Bus Hold

Output Remains Active during Bus Hold

Output Retains Current State during Bus Hold

Output Weakly Held at VCC during Reset

Output Driven to VCC during Reset

Output Driven to VSS during Reset

Output Floats during Reset

Output Remains Active during Reset

Output Retains Current State during Reset

Output Driven to VCC during Idle Mode

Output Driven to VSS during Idle Mode

Output Floats during Idle Mode

Output Remains Active during Idle Mode

Output Retains Current State during Idle Mode

Output Driven to VCC during Powerdown Mode

Output Driven to VSS during Powerdown Mode

Output Floats during Powerdown Mode

Output Remains Active during Powerdown Mode

Output Retains Current State during Powerdown Mode

18

Product Name Datasheet

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