ADDS-21160M-EZLITE 查看數據表（PDF） - Analog Devices

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ADDS-21160M-EZLITE

1 MSPS 16-/14-Bit Analog I/O Port

Analog Devices 

AD15700

Overdriving the Input Stage

Sustained input differential voltages greater than 3.4 V should be

avoided as the input transistors may be damaged. Input clamp

diodes are recommended if the possibility of this condition exists.

The voltages at the collectors of the input pairs are set to 200 mV

from the power supply rails. This allows the amplifier to remain

in linear operation for input voltages up to 500 mV beyond the

supply voltages. Driving the input common-mode voltage beyond

that point will forward bias the collector junction of the input

transistor, resulting in phase reversal. Sustaining this condition

for any length of time should be avoided as it is easy to exceed

the maximum allowed input differential voltage when the amplifier

is in phase reversal.

Output Stage, Open-Loop Gain, and Distortion Versus

Clearance from Power Supply

The amplifier features a rail-to-rail output stage. The output

transistors operate as common emitter amplifiers, providing the

output drive current as well as a large portion of the amplifier’s

open-loop gain.

Used as a unity gain follower, the amplifier output will exhibit

more distortion in the peak output voltage region around

VCC –0.7 V. This unusual distortion characteristic is caused by

the input stage architecture and is discussed in detail in the

section covering Input Stage Operation.

Output Overdrive Recovery

Output overdrive of an amplifier occurs when the amplifier

attempts to drive the output voltage to a level outside its normal

range. After the overdrive condition is removed, the amplifier must

recover to normal operation in a reasonable amount of time. As

shown in Figure 41, the amplifier recovers within 100 ns from

negative overdrive and within 80 ns from positive overdrive.

RF = RG = 2k⍀

RG

RF

VOUT

IN

RLT

50V

DIFFERENTIAL

DRIVE

FROM

INPUT STAGE

I1

25mA

Q42

Q51

I2

25mA

Q47

Q37 Q38

Q20

R29

300⍀

Q21

Q43 Q48

Q68

C9

1.5pF

Q27

C5

1.5pF

VOUT

Q49

I4

25mA

I5

25mA

Q50

Q44

Figure 40. Output Stage Simplified Schematic

The output voltage limit depends on how much current the

output transistors are required to source or sink. For applica-

tions with very low drive requirements (a unity gain follower

driving another amplifier input, for instance), the amplifier

typically swings within 20 mV of either voltage supply. As the

required current load increases, the saturation output voltage

will increase linearly as ILOAD ϫ RC, where ILOAD is the required

load current and RC is the output transistor collector resistance.

For the amplifier, the collector resistances for both output tran-

sistors are typically 25 W. As the current load exceeds the rated

output current of 15 mA, the amount of base drive current

required to drive the output transistor into saturation will reach

its limit, and the amplifier’s output swing will rapidly decrease.

The open-loop gain of the amplifier decreases approximately

linearly with load resistance and also depends on the output

voltage. Open-loop gain stays constant to within 250 mV of the

positive power supply, 150 mV of the negative power supply

and then decreases as the output transistors are driven further

into saturation.

The distortion performance of the amplifiers differs from

conventional amplifiers. Typically an amplifier’s distortion

performance degrades as the output voltage amplitude increases.

VS = ؎2.5V

VIN = ؎2.5V

RL = 1k⍀ TO GND

1V

100ns

Figure 41. Overdrive Recovery

Driving Capacitive Loads

Capacitive loads interact with an amplifier’s output impedance

to create an extra delay in the feedback path. This reduces circuit

stability and can cause unwanted ringing and oscillation. A given

value of capacitance causes much less ringing when the amplifier

is used with a higher noise gain.

The capacitive load drive of the amplifier can be increased by

adding a low valued resistor in series with the capacitive load.

Introducing a series resistor tends to isolate the capacitive load

from the feedback loop, thereby diminishing its influence.

Figure 42 shows the effect of a series resistor on capacitive drive

for varying voltage gains. As the closed-loop gain is increased, the

larger phase margin allows for larger capacitive loads with less

overshoot. Adding a series resistor at lower closed-loop gains

accomplishes the same effect. For large capacitive loads, the

frequency response of the amplifier will be dominated by the

roll-off of the series resistor and capacitive load.

1000

u

VS = 5

200mV STEP

WITH 30% OVERSHOOT

100

RS = 5⍀

RS = 0⍀

RS = 20⍀

10

RS = 0⍀, 5⍀

RS = 20V

RG

RF

RS VOUT

CL

1

0

1

2

3

4

5

CLOSED-LOOP GAIN – V/V

Figure 42. Capacitive Load Drive vs. Closed-Loop Gain

–40–

REV. A

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