CP2114 查看數據表（PDF） - Silicon Laboratories

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CP2114

SINGLE-CHIP USB AUDIO TO I2S DIGITAL AUDIO BRIDGE

Silicon Laboratories 

CP2114

Table 5. GPIO Output Specifications

–40 to +85 °C unless otherwise specified.

Parameter

GPIO.9 Clock Output

Test Condition

TX Toggle Rate

RX Toggle Rate

Min

fOUT x

0.985

—

—

Typ

fOUT

20

20

Max

fOUT x

1.015

—

—

Unit

Hz

Hz

Hz

Table 6. One Time Programming Specifications

VDD = 3.3 to 3.6 V, –40 to +85 °C unless otherwise specified.

Parameter

Digital Port I/O Supply Voltage

(VIO) during programming

Voltage on VPP with respect to

GND during a programming

operation

Capacitor on VPP for programming

Test Condition

VIO > 3.3 V

Min

3.3

5.75

Typ

Max

VDD

— VIO + 3.6

Unit

V

V

—

4.7

—

µF

Table 7. System Clock Specifications

VDD = 3.3 to 3.6 V, –40 to +85 °C unless otherwise specified.

Parameter

Internal Oscillator

Test Condition

Min

Typ

Max

SF = 0 (Register: System_Props, bit: 1) —

48

—

SF = 1 (Register: System_Props, bit: 1) — 49.152 —

Unit

MHz

MHz

External CMOS clock input SF = 0 (Register: System_Props, bit: 1) 47.880 48 48.120

frequency

SF = 1 (Register: System_Props, bit: 1) — 49.152 —

MHz

MHz

1. Depending on the requirements of the external DAC, the system clock frequency will be either 48.0 or 49.152 MHz. See

Section 5.6 for more information.

2. The USB specification requires a clock accuracy of ±0.25%.

Rev. 1.1

7

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