AN383 查看數據表（PDF） - Silicon Laboratories
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AN383 Datasheet PDF : 69 Pages
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AN383
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Figure 3. Layout Example 2
Figure 4 shows critical component layout with top and bottom side placement, top and bottom side routing, analog
and digital input and output support, and support for all devices except the Si4702/03 receiver family. The Si4702/
03 receiver family can be supported in this example if the VA supply is routed to VA/LIN/DFS pin 16 and R12 is
removed. The crystal is not available when digital audio is used due to the multipurpose role of GPO3/DCLK pin
17. Note that the RCLK trace is not a sensitive node when an external reference clock is used instead of the
crystal. For this reason, an external reference clock allows more routing flexibility.
F1, C14, C15, C18, R19, and R20 are placed as close to the chip as possible. For the Si4704/05/06/2x with the
short antenna option, pin 4 is populated with L1 and C4, C17 is not populated; for the Si473x AM receiver, C4 is
replaced with C16, L1 is replaced with L2, and C17 is populated.
Figure 4. Layout Example 3
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Rev. 0.8
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