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AD7273 查看數據表(PDF) - Analog Devices

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AD7273 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
PRELIMINARY TECHNICAL DATA
Preliminary Technical Data
Power-Down Mode
This mode is intended for use in applications where
slower throughput rates are required; either the ADC is
powered down between each conversion, or a series of
conversions may be performed at a high throughput rate
and then the ADC is powered down for a relatively long
duration between these bursts of several conversions.
When the AD7273/AD7274 is in Power-Down, all analog
circuitry is powered down.
To enter Power-Down, the conversion process must be
interrupted by bringing CS high anywhere after the second
falling edge of SCLK and before the 10th falling edge of
SCLK as shown in Figure 13. Once CS has been brought
high in this window of SCLKs, then the part will enter
Power-Down and the conversion that was intiated by the
falling edge of CS will be terminated and SDATA will go
back into three-state. If CS is brought high before the
second SCLK falling edge, then the part will remain in
Normal Mode and will not power-down. This will avoid
accidental power-down due to glitches on the CS line.
AD7273/AD7274
In order to exit this mode of operation and power the
AD7273/AD7274 up again, a dummy conversion is per-
formed. On the falling edge of CS the device will begin to
power up, and will continue to power up as long as CS is
held low until after the falling edge of the 10th SCLK.
The device will be fully powered up once 16 SCLKs have
elapsed and valid data will result from the next conversion
as shown in Figure 14. If CS is brought high before the
10th falling edge of SCLK, then the AD7273/AD7274
will go back into Power- Down again. This avoids acci-
dental power up due to glitches on the CS line or an inad-
vertent burst of 8 SCLK cycles while CS is low. So,
although the device may begin to power up on the falling
edge of CS, it will power down again on the rising edge
of CS as long as it occurs before the 10th SCLK falling
edge.
&6
SCLK
12
10
16
SDATA
INVALID DATA
THREE-STATE
Figure 13. Entering Power Down Mode
THE PART BEGINS
TO POWER UP
&6
SCLK
A
1
10
16
THE PART IS FULLY
POWERED UP WITH VIN
FULLY ACQUIRED
1
16
SDATA
INVALID DATA
VALID DATA
Figure 14. Exiting Power Down Mode
REV. PrB
17

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