MB90350E 查看數據表（PDF） - Cypress Semiconductor
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MB90350E Datasheet PDF : 85 Pages
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MB90350E Series
F2MC-16LX16-bit Microcontrollers
The MB90350E series, loaded 1 channel FULL-CAN* interface and Flash ROM, is general-purpose Cypress 16-bit microcontroller
designing for automotive and industrial applications. Its main feature is the on-board CAN interface, which conforms to CAN standard
Version2.0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal
full CAN approach.
The power supply (3 V) is supplied to the MCU core from an internal regulator circuit. This creates a major advantage in terms of EMI
and power consumption.
The PLL clock multiplication circuit provides an internal 42 ns instruction execution time from an external 4 MHz clock. Also, the clock
supervisor function can monitor main clock and sub clock independently.
As the peripheral resources, the unit features a 4-channel Output Compare Unit, 6-channel Input Capture Unit, 2 separate 16-bit
free-run timers, 2-channel LIN-UART and 15-channel 8/10-bit A/D converter built-in.
: Controller Area Network (CAN) - License of Robert Bosch GmbH
Features
Clock
Powerful interrupt function
■ Built-in PLL clock frequency multiplication circuit
■ Selection of machine clocks (PLL clocks) is allowed among
frequency division by two on oscillation clock, and multipli-
cation of 1 to 6 times of oscillation clock (for 4 MHz oscillation
clock, 4 MHz to 24 MHz).
■ Operation by sub clock (up to 50 kHz : 100 kHz oscillation clock
divided by two) is allowed (devices without S-suffix only) .
■ Minimum execution time of instruction : 42 ns (when operating
with 4-MHz oscillation clock, and 6-time
multiplied PLL clock).
■ Built-in clock modulation circuit
16 Mbytes CPU memory space
24-bit internal addressing
Instruction system best suited to controller
■ Powerful 8-level, 34-condition interrupt feature
■ Up to 8 channels external interrupts are supported.
Automatic data transfer function independent of
CPU
■ Extended intelligent I/O service function (EI2OS): up to 16
channels
■ DMA: up to 16 channels
Low power consumption (standby) mode
■ Sleep mode (a mode that stops CPU operating clock)
■ Main timer mode (a timebase timer mode switched from the
main clock mode)
■ PLL timer mode (a timebase timer mode switched from the PLL
clock mode)
■ Wide choice of data types (bit, byte, word, and long word)
■ Wide choice of addressing modes (23 types)
■ Enhanced multiply-divide instructions with sign and RETI
instructions
Clock supervisor (MB90x356x and MB90x357x
only)
Main clock or sub clock is monitored independently.
Enhanced high-precision computing with 32-bit
accumulator
Instruction system compatible with high-level
language (C language) and multitask
■ Employing system stack pointer
■ Enhanced various pointer indirect instructions
■ Barrel shift instructions
Increased processing speed
4-byte instruction queue
■ Watch mode (a mode that operates sub clock and watch timer
only)
■ Stop mode (a mode that stops oscillation clock and sub clock)
■ CPU intermittent operation mode
Process
CMOS technology
I/O port
■ General-purpose input/output port (CMOS output)
49 ports (devices without S-suffix : devices that correspond to
sub clock)
51 ports (devices with S-suffix : devices that do not correspond
to sub clock)
Sub clock pin (X0A, X1A)
■ Yes (using the external oscillation) : devices without S-suffix
■ No (using the sub clock mode at internal CR oscillation) :
devices with S-suffix
Timer
■ Timebase timer, watch timer, watchdog timer : 1 channel
Cypress Semiconductor Corporation • 198 Champion Court
• San Jose, CA 95134-1709 • 408-943-2600
Document Number: 002-04493 Rev. *A
Revised April 7, 2016
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