KSZ9031MNX 查看數據表（PDF） - Microsemi Corporation

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KSZ9031MNX

Gigabit Ethernet Transceiver with GMII/MII Support

Microsemi Corporation 

KSZ9031MNX

TABLE 2-1: SIGNALS - KSZ9031MNX (CONTINUED)

Pin

Number

Pin

Name

Type

Note

2-1

Description

125 MHz clock output

This pin provides a 125 MHz reference clock output option for use by the

55

CLK125_NDO/

LED_MODE

I/O

MAC.

Config mode: The voltage on this pin is sampled during the power-up/reset

process to determine the value of LED_MODE. See the Strapping Options -

KSZ9031MNX section for details.

Chip reset (active low)

56

RESET_N

Ipu

Hardware pin configurations are strapped-in (sampled and latched) at the de-

assertion (rising edge) of RESET_N. See the Strapping Options -

KSZ9031MNX section for details.

57

TX_CLK

O MII mode: MII TX_CLK (Transmit Reference Clock) output

On-chip 1.2V LDO controller output

58

LDO_O

O

This pin drives the input gate of a P-channel MOSFET to generate 1.2V for

the chip’s core voltages. If the system provides 1.2V and this pin is not used,

it can be left floating.

59

AVDDL_PLL

P

1.2V analog VDD for PLL

25 MHz crystal feedback

60

XO

O

This pin connects to one end of an external 25 MHz crystal.

This pin is a no connect if an oscillator or other external (non-crystal) clock

source is used.

Crystal/Oscillator/External Clock input

61

XI

I

This pin connects to one end of an external 25 MHz crystal or to the output of

an oscillator or other external (non-crystal) clock source.

25 MHz ±50 ppm tolerance

No connect

62

NC

— This pin is not bonded and can be connected to AVDDH power for footprint

compatibility with the KSZ9021GN Gigabit PHY.

63

ISET

I/O

Set the transmit output level.

Connect a 12.1 kΩ 1% resistor to ground on this pin.

64

AGNDH

GND Analog ground.

Paddle

Note 2-1

P_GND

GND Exposed paddle on bottom of chip.

Connect P_GND to ground.

P = power supply

GND = ground

I = input

O = output

I/O = bi-directional

Ipu = Input with internal pull-up (see Electrical Characteristics for value).

Ipu/O = Input with internal pull-up (see Electrical Characteristics for value) during power-up/reset;

output pin otherwise.

 2016 Microchip Technology Inc.

DS00002096C-page 11

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