Figure 7.9
Figure 7.10
Figure 7.11
Figure 8.1
Figure 8.2
Figure 8.3
Figure 8.4
Figure 8.5
Figure 8.6
Figure 8.7
Figure 8.8
Figure 8.9
Figure 8.10
Figure 8.11
Figure 8.12
Figure 8.13
Figure 8.14
Figure 8.15
Figure 8.16
Figure 8.17
Figure 8.18
Figure 8.19
Figure 8.20
Figure 8.21
Figure 8.22
Figure 8.23
Figure 8.24
Figure 8.25
Figure 8.26
Figure 8.27
Figure 8.28
Figure 8.29
Figure 8.30
Figure 8.31
Figure 8.32
Figure 8.33
Figure 8.34
Figure 8.35
Figure 8.36
Figure 8.37
Figure 8.38
Figure 8.39
Figure 8.40
xvi
Port 9 Pin Configuration ...................................................................................... 177
Port A Pin Configuration...................................................................................... 183
Port B Pin Configuration...................................................................................... 195
16-bit timer Block Diagram (Overall).................................................................. 205
Block Diagram of Channels 0 and 1 .................................................................... 206
Block Diagram of Channel 2................................................................................ 207
16TCNT Access Operation [CPU → 16TCNT (Word)]...................................... 230
Access to Timer Counter (CPU Reads 16TCNT, Word) ..................................... 230
Access to Timer Counter H (CPU Writes to 16TCNTH, Upper Byte)................ 231
Access to Timer Counter L (CPU Writes to 16TCNTL, Lower Byte) ................ 231
Access to Timer Counter H (CPU Reads 16TCNTH, Upper Byte) ..................... 231
Access to Timer Counter L (CPU Reads 16TCNTL, Lower Byte) ..................... 232
16TCR Access (CPU Writes to 16TCR).............................................................. 232
16TCR Access (CPU Reads 16TCR) ................................................................... 232
Counter Setup Procedure (Example).................................................................... 234
Free-Running Counter Operation ......................................................................... 235
Periodic Counter Operation.................................................................................. 235
Count Timing for Internal Clock Sources ............................................................ 236
Count Timing for External Clock Sources (when Both Edges are Detected) ...... 236
Setup Procedure for Waveform Output by Compare Match (Example) .............. 237
0 and 1 Output (TOA = 1, TOB = 0).................................................................... 238
Toggle Output (TOA = 1, TOB = 0) .................................................................... 238
Output Compare Output Timing .......................................................................... 239
Setup Procedure for Input Capture (Example) ..................................................... 240
Input Capture (Example) ...................................................................................... 240
Input Capture Signal Timing................................................................................ 241
Setup Procedure for Synchronization (Example) ................................................. 242
Synchronization (Example).................................................................................. 243
Setup Procedure for PWM Mode (Example) ....................................................... 244
PWM Mode (Example 1) ..................................................................................... 245
PWM Mode (Example 2) ..................................................................................... 246
Setup Procedure for Phase Counting Mode (Example)........................................ 247
Operation in Phase Counting Mode (Example).................................................... 248
Phase Difference, Overlap, and Pulse Width in Phase Counting Mode............... 248
Timing for Setting 16-Bit Timer Output Level by Writing to TOLR .................. 249
Timing of Setting of IMFA and IMFB by Compare Match................................. 250
Timing of Setting of IMFA and IMFB by Input Capture .................................... 251
Timing of Setting of OVF .................................................................................... 252
Timing of Clearing of Status Flags ...................................................................... 252
Contention between 16TCNT Write and Clear.................................................... 254
Contention between 16TCNT Word Write and Increment .................................. 255
Contention between 16TCNT Byte Write and Increment.................................... 256
Contention between General Register Write and Compare Match ...................... 257