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MCF5271CVM150 查看數據表(PDF) - Freescale Semiconductor

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产品描述 (功能)
生产厂家
MCF5271CVM150
Freescale
Freescale Semiconductor Freescale
MCF5271CVM150 Datasheet PDF : 42 Pages
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Electrical Characteristics
Table 9. DC Electrical Specifications1 (continued)
Characteristic
Symbol
Min
Typical
Max
Unit
Load Capacitance4
Low drive strength
High drive strength
Core Operating Supply Current 5
Master Mode
CL
IDD
25
pF
50
pF
135
150
mA
Pad Operating Supply Current
Master Mode
Low Power Modes
OIDD
100
TBD
mA
μA
DC Injection Current 3, 6, 7, 8
IIC
VNEGCLAMP =VSS– 0.3 V, VPOSCLAMP = VDD + 0.3
Single Pin Limit
Total processor Limit, Includes sum of all stressed pins
–1.0
–10
1.0
mA
10
mA
1 Refer to Table 10 for additional PLL specifications.
2 Refer to the MCF5271 signals section for pins having weak internal pull-up devices.
3 This parameter is characterized before qualification rather than 100% tested.
4 pF load ratings are based on DC loading and are provided as an indication of driver strength. High speed interfaces require
transmission line analysis to determine proper drive strength and termination. See High Speed Signal Propagation:
Advanced Black Magic by Howard W. Johnson for design guidelines.
5 Current measured at maximum system clock frequency, all modules active, and default drive strength with matching load.
6 All functional non-supply pins are internally clamped to VSS and their respective VDD.
7 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
8 Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current
conditions. If positive injection current (Vin > VDD) is greater than IDD, the injection current may flow out of VDD and could
result in external power supply going out of regulation. Insure external VDD load will shunt current greater than maximum
injection current. This will be the greatest risk when the processor is not consuming power. Examples are: if no system
clock is present, or if clock rate is very low which would reduce overall power consumption. Also, at power-up, system clock
is not present during the power-up sequence until the PLL has attained lock.
7.4 Oscillator and PLLMRFM Electrical Characteristics
Table 10. HiP7 PLLMRFM Electrical Specifications1
Num
Characteristic
1 PLL Reference Frequency Range
Crystal reference
External reference
1:1 mode (NOTE: fsys/2 = 2 × fref_1:1)
2 Core frequency
CLKOUT Frequency 2
External reference
On-Chip PLL Frequency
3 Loss of Reference Frequency 3, 5
4 Self Clocked Mode Frequency 4, 5
5 Crystal Start-up Time 5, 6
Symbol
Min.
Value
fref_crystal
fref_ext
fref_1:1
fsys
fsys/2
fLOR
fSCM
tcst
8
8
24
0
fref ÷ 32
100
10.25
Max.
Value
25
25
75
150
75
75
1000
15.25
10
Unit
MHz
MHz
MHz
MHz
kHz
MHz
ms
MCF5271 Integrated Microprocessor Hardware Specification, Rev. 4
20
Freescale Semiconductor

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