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IRF1324STRL-7PP 查看數據表(PDF) - Infineon Technologies

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产品描述 (功能)
生产厂家
IRF1324STRL-7PP
Infineon
Infineon Technologies Infineon
IRF1324STRL-7PP Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
IRF1324S-7PPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
24 ––– ––– V VGS = 0V, ID = 250µA
––– 0.023 ––– V/°C Reference to 25°C, ID = 5mA
––– 0.80 1.0 m VGS = 10V, ID = 160A 
VGS(th)
IDSS
IGSS
RG
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
2.0 ––– 4.0 V VDS = VGS, ID = 250µA
–––
–––
–––
–––
20
250
µA
VDS =24V, VGS = 0V
VDS =19V,VGS = 0V,TJ =125°C
–––
–––
––– 200
––– -200
nA
VGS = 20V
VGS = -20V
––– 3.0 ––– 
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Forward Trans conductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
190 ––– ––– S VDS = 15V, ID = 160A
––– 180 252
ID = 75A
––– 47 –––
VDS = 12V
––– 58 ––– nC VGS = 10V
––– 122 –––
––– 19 –––
––– 240 –––
––– 86 –––
––– 93 –––
––– 7700 –––
––– 3380 –––
VDD = 16V
ns
ID = 160A
RG= 2.7
VGS = 10V
VGS = 0V
VDS = 19V
––– 1930 ––– pF ƒ = 1.0MHz, See Fig. 5
Coss eff.(ER)
Effective Output Capacitance (Energy Related) ––– 4780 –––
VGS = 0V, VDS = 0V to 19V
Coss eff.(TR)
Effective Output Capacitance (Time Related)
––– 4970 –––
VGS = 0V, VDS = 0V to 19V
Diode Characteristics
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
–––
–––
––– 429
––– 1640
A
MOSFET symbol
showing the
integral reverse
p-n junction diode.
––– ––– 1.3
––– 71 107
––– 74 110
V TJ = 25°C,IS = 160A,VGS = 0V 
ns
TJ = 25°C
TJ = 125°C
VDD = 20V
IF = 160A,
–––
–––
83
92
120
140
nC
TJ = 25°C
TJ = 125°C
di/dt = 100A/µs 
––– 2.0 ––– A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 240A. Note that
current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.018mH, RG = 25, IAS = 160A, VGS =10V. Part not recommended for use above
this value.
ISD 160A, di/dt 600A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
Ris measured at TJ approximately 90°C.
2
2015-10-15

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