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SSM2250 查看數據表(PDF) - Analog Devices

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SSM2250 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
SSM2250
R2
20kΩ
LEFT IN
SHUTDOWN
RIGHT IN
R1 NC 1
20kΩ
2
14 NC
13
220μF
+
1μF
R1
20kΩ
3 SSM2250 12
5V
BTL
1kΩ
NC
4
11
OUT
10μF +
5
10
220μF
6
9
+
1μF
NC 7
8 NC
1kΩ
R2
20kΩ
NC = NO CONNECT
5V
100kΩ
Figure 14. Typical Application
The output coupling capacitor creates a high-pass filter with a
cutoff frequency of
f 3 dB
=
1
2πRL
CC
(2)
where:
RL is the resistance of the headphone.
CC is the output coupling capacitor.
Although a majority of headphones have approximately 80 Ω of
resistance, the resistance can vary between models and manu-
facturers. Headphone resistances are commonly between 32 Ω
to 600 Ω. Using a 220 μF capacitor, as shown in Figure 14, the
worst-case −3 dB corner frequency would be 22 Hz, with a 32 Ω
headphone load. Smaller output capacitors could be used at the
expense of low frequency response to the headphones.
An input coupling capacitor should be used to remove dc bias
from the inputs to the SSM2250. Again, the input coupling
capacitor in combination with the input resistor creates a high-
pass filter with a corner frequency of
f 3 dB
=
1
2πR1C1
(3)
Using the values shown in Figure 14, where R1 = 20 kΩ and
C1 = 1 μF, creates a corner frequency of 8 Hz. This is acceptable,
as the PC99 audio requirement specifies the computer audio
system bandwidth to be 20 Hz to 20 kHz.
Pin 10 on the SSM2250 provides the proper bias voltage for
the amplifiers. A 0.1 μF capacitor should be connected here to
reduce sensitivity to noise on the power supply. A larger capaci-
tor can be used if more rejection from power supply noise is
required.
The SSM2250 has excellent phase margin and is stable even
under heavy loading. Therefore, a feedback capacitor in parallel
with R2 is not required, as it is in some competitors’ products.
Power Dissipation
An important advantage in using a bridged output configura-
tion is that bridged output amplifiers are more efficient than
single-ended amplifiers in delivering power to a load.
1.50
VDD = 5V
1.25
1.00
RL = 4Ω
0.75
0.50
RL = 8Ω
0.25
RL = 16Ω
0
0
0.25
0.50
0.75
1.00
1.25
1.50
OUTPUT POWER (W)
Figure 15. Power Dissipation vs. Output Power in BTL Mode
PDISS, MAX
=
2VDD 2
π2 RL
(4)
Using Equation 4 and the power derating curve in Figure 17,
the maximum ambient temperature can be easily found. This
ensures that the SSM2250 does not exceed its maximum
junction temperature of 150°C.
The power dissipation for a single-ended output application
where an output coupling capacitor is used is shown in
Figure 16.
Rev. A | Page 8 of 12

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