VSC6511 查看數據表（PDF） - Vitesse Semiconductor
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VSC6511 Datasheet PDF : 22 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
SMPTE 292M Serializer, Deserializer, and
Deserializer/Reclocker
Advance Product Information
VSC6511
Deserializer / Reclocker Mode
Features
• Compliant with SMPTE 292M at 1.485Gb/s or 1.485Gb/s
• Clock and Data Recovery
• 1:20 Deserializer, Descrambler and NRZI Decoder with ENABLE
• Data Framer aligns data to SAV/EAV
• 2 or 4 User Configurable 75Ωcable driver outputs
• On-chip Clock Multiplier Unit
• CRC Checker, LINE, FRAME, HANC Indication
• 20 Bit TTL Interface at 74.25 MHz
• On-chip Clock Multiplier and Recovery Unit
• 3.3V, 1300mW, typical power (depends on number of enabled cable driver outputs and amplitude)
In the Deserializer/Reclocker Mode, both the Deserializer and the Reclocker are active. All the features of
each function are available with the exception of the reclocker status/control pins on the databus D0 and D2. In
this mode, D[19:0] is used solely for the deserialized recovered data. Also, RCLK is used for the deserializer’s
recovered clock and will not provide a buffered version of REFCLK. The BYPASS capability is also not avail-
able.
Figure 10: Deserializer/Reclocker Mode Block Diagram
D[19:10]
LUMA
CHROMA
D[9:0]
SCREN
OE0
SDO0
SDO0
ISET0
OE1
SDO1
SDO1
ISET1
CABLE DRIVER
OUTPUTS
SDI
SDI
REFCLK
74.25MHz
Clock
Recovery
Unit
Deserializer
1.485GHz
/20
Clock
Multiply
x20
1.485GHz
NRZI Decoder
Descrambler
CRC Check D Q
Framer
LOCK
CRCERR
LINE
FRAME
HANC
RCLK
Page 12
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52311-0, Rev 2.1
6/25/01
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