XRT91L81 查看數據表（PDF） - Exar Corporation

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XRT91L81

2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER

Exar Corporation 

PRELIMINARY

XRT91L81

2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER

REV. P1.0.3

FIGURE 15. PARALLEL REMOTE LOOPBACK .................................................................................................................................... 23

4.3 DIGITAL LOCAL LOOPBACK ....................................................................................................................... 24

FIGURE 16. DIGITAL LOOPBACK...................................................................................................................................................... 24

4.4 SONET JITTER REQUIREMENTS ................................................................................................................. 25

4.4.1 JITTER TOLERANCE: ................................................................................................................................................ 25

FIGURE 17. JITTER TOLERANCE MASK............................................................................................................................................ 25

4.4.2 JITTER TRANSFER .................................................................................................................................................... 26

4.4.3 JITTER GENERATION................................................................................................................................................ 26

5.0 SERIAL MICROPROCESSOR INTERFACE BLOCK ......................................................................... 27

FIGURE 18. SIMPLIFIED BLOCK DIAGRAM OF THE SERIAL MICROPROCESSOR INTERFACE ................................................................. 27

5.1 SERIAL TIMING INFORMATION ................................................................................................................... 27

FIGURE 19. TIMING DIAGRAM FOR THE SERIAL MICROPROCESSOR INTERFACE ................................................................................ 27

5.2 16-BIT SERIAL DATA INPUT DESCRITPTION ............................................................................................. 28

5.2.1 R/W (SCLK1)............................................................................................................................................................... 28

5.2.2 A[5:0] (SCLK2 - SCLK7)............................................................................................................................................. 28

5.2.3 X (DUMMY BIT SCLK8) .............................................................................................................................................. 28

5.2.4 D[7:0] (SCLK9 - SCLK16)........................................................................................................................................... 28

5.3 8-BIT SERIAL DATA OUTPUT DESCRIPTION ............................................................................................. 28

6.0 REGISTER MAP AND BIT DESCRIPTIONS ....................................................................................... 29

TABLE 7: MICROPROCESSOR REGISTER BIT DESCRIPTION .............................................................................................................. 29

TABLE 6: MICROPROCESSOR REGISTER MAP.................................................................................................................................. 29

TABLE 9: MICROPROCESSOR REGISTER BIT DESCRIPTION .............................................................................................................. 30

TABLE 8: MICROPROCESSOR REGISTER BIT DESCRIPTION .............................................................................................................. 30

TABLE 10: MICROPROCESSOR REGISTER BIT DESCRIPTION ............................................................................................................ 31

TABLE 11: MICROPROCESSOR REGISTER BIT DESCRIPTION ............................................................................................................ 33

TABLE 12: MICROPROCESSOR REGISTER BIT DESCRIPTION ............................................................................................................ 34

TABLE 13: MICROPROCESSOR REGISTER 0X02H BIT DESCRIPTION ................................................................................................. 35

TABLE 14: MICROPROCESSOR REGISTER 0X01H BIT DESCRIPTION ................................................................................................. 35

7.0 ELECTRICAL CHARACTERISTICS ................................................................................................... 36

ABSOLUTE MAXIMUMS ................................................................................................................................. 36

DC ELECTRICAL CHARACTERISTICS.............................................................................................................. 36

196 SHRINK THIN BALL GRID ARRAY ................................................................................................. 37

(12.0 MM X 12.0 MM, STBGA).......................................................................................................... 37

REV. 1.00 ......................................................................................................................................... 37

ORDERING INFORMATION .................................................................................................................. 37

REVISION HISTORY ...................................................................................................................................... 38

II

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