AS3910
Data Sheet - Detailed Description
7.0.9 ISO-14443 and NFCIP Framing
This block performs ISO-14443 and NFCIP-1 106 kbps active communication framing for receive and transmit according to the selected ISO
mode and data rate settings.
In reception, it takes demodulated subcarrier signal from Receiver. It recognizes the SOF, EOF and data bits; performs parity and CRC
check; organizes the received data in bytes and places them in the FIFO.
During transmit, it operates inversely; it takes bytes from FIFO; generates parity and CRC bits; adds SOF and EOF; and performs final
encoding before passing modulation signal to transmitter.
In Transparent mode, the framing and FIFO are bypassed; the digitized subcarrier signal, which is Receiver output is directly sent to
SDATAO pin; signal applied to SDATAI pin is directly used to modulate the transmitter.
7.0.10 FIFO
The AS3910 contains a 32byte FIFO. Depending on the mode, it contains either data that has been received or data that is to be transmitted.
7.0.11 Control Logic
The control logic contains I/O registers, which define the operation of device.
7.0.12 SPI Interface
A 4-wire Serial Peripheral interface (SPI) is used for communication between external microcontroller and the AS3910.
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Revision 2.3
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