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KS9286 查看數據表(PDF) - Samsung

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KS9286 Datasheet PDF : 35 Pages
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KS9286B/KS9286B-L
DIGITAL SIGNAL PROCESSOR for CDP
1) CNTL-Z REGISTER
It is a register to control zero cross mute of audio data, phase terminal
control, phase servo control and having or not of CRCF in data SQDT.
ZCMT
-
NCLV
CRCQ
DATA = 0
D3 Zero cross mute is OFF
D2 -
D1 The phase servo is acted by frame sync
D0 SQDT outputs except for SQOK
DATA = 1
Zero cross mute is ON
-
The phase servo is controlled by base
counter
SQDT=CRCF when S0S1='H'
Table 2. CNTL-Z register & data
2) CNTL-S REGISTER
It is a register to control frame sync protection and attenuation.
FSEM
0
0
1
1
FSEL
0
1
0
1
FRAME
2
4
8
13
WSEL
0
1
CLOCK
+3
+7
ATTM
MUTE
dB
0
0
0
0
1
-
1
0
-12
1
1
-12
Table 3. CNTL-S register & data
3) CNTL-L, U REGISTER
After the counter of track that must be counted is inputted from Micom, the data
is loaded to tracking counter by CNTL-L, U register.
11

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