HI1396(1997) 查看數據表（PDF） - Intersil
零件编号
产品描述 (功能)
生产厂家
HI1396 Datasheet PDF : 10 Pages
| |||
HI1396
Absolute Maximum Ratings TA = 25oC
Supply Voltage (AVEE, DVEE) . . . . . . . . . . . . . . . . . . . . . . . . . . .-7V
Analog Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . -2.7V to +0.5V
Reference Input Voltage
VRT, VRB, VRM . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.7V to +0.5V
|VRT - VRB| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5V
Digital Input Voltage
CLK, CLK, MINV, LINV . . . . . . . . . . . . . . . . . . . . . . . -4V to +0.5V
|CLK-CLK | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V
VRM Pin Input Current (IVRM) . . . . . . . . . . . . . . . . . . -3mA to +3mA
Digital Output Current (ID0 to ID7) . . . . . . . . . . . . . . . -30mA to 0mA
Operating Conditions (Note 1)
Thermal Information
Thermal Resistance (Typical, Note 1)
θJAoC/W θJCoC/W
SBDIP Package . . . . . . . . . . . . . . . . . .
45
7
CLCC Package . . . . . . . . . . . . . . . . . .
45
8
Maximum Junction Temperature
Ceramic Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC
Maximum
Maximum
Storage Temperature Range (TSTG)
Lead Temperature (Soldering 10s) . .
.
.
.
.
.
.
.-65oC
......
to
.
150oC
300oC
Temperature Ranges (Note 4)
SBDIP Package, TA
CLCC Package, TC .
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
. -20oC to 75oC
-20oC to 100oC
Supply Voltage Ranges
AVEE, DVEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5.5V to -4.95V
AVEE - DVEE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.05V to 0.05V
AGND - DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.05V to 0.05V
Reference Input Voltage
VRT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.1V to 0.1V
VRB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.2V to -1.8V
Analog Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . VRB to VRT
Pulse Width of Clock
tPW1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.0ns (Min)
tPW0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.0ns (Min)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications TA = 25oC, AVEE = DVEE = -5.2V, VRT = 0V, VRB = -2V (Note 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
SYSTEM PERFORMANCE
Resolution
-
8
Integral Linearity Error, INL
HI1396JCJ, HI1396AIL
Differential Linearity Error, DNL
HI1396JCJ, HI1396AIL
ANALOG INPUT
fC = 125 MSPS
fC = 125 MSPS
-
±0.3
-
-
Input Bandwidth
Analog Input Capacitance, CIN
Analog Input Resistance, RIN
Input Bias Current, IIN
REFERENCE INPUTS
VIN = 2VP-P
VIN = 1V + 0.07VRMS
VIN = -1V
200
-
-
17
50
190
20
130
Reference Resistance, RREF
Offset Voltage
EOT
VRT
EOB
VRB
DIGITAL INPUTS
75
110
8
19
0
15
Logic H Level, VIH
Logic L Level, VIL
Logic H Current, IIH
Logic L Current, IIL
Input Capacitance
Input Connected to -0.8V
Input Connected to -1.6V
-1.13
-
-
-
0
-
0
-
-
7
DIGITAL OUTPUTS
Logic H Level, VOH
Logic L Level, VOL
RL = 50Ω to -2V
RL = 50Ω to -2V
-1.10
-
-
-
MAX
-
±0.5
±0.5
-
-
-
400
155
32
24
-
-1.50
50
50
-
-
-1.62
UNIT
Bits
LSB
LSB
MHz
pF
kΩ
µA
Ω
mV
mV
V
V
µA
µA
pF
V
V
4-1158
Share Link: 