LTC1196(Rev_0) 查看數據表（PDF） - Linear Technology

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LTC1196
(Rev.:Rev_0)

8-Bit, SO-8, 1MSPS ADCs with Auto-Shutdown Options

Linear Technology 

LTC1196/LTC1198

PI FU CTIO S

LTC1196

CS (Pin 1): Chip Select Input. A logic low on this input

enables the LTC1196. A logic high on this input disables

the LTC1196.

IN+ (Pin 2): Analog Input. This input must be free of noise

with respect to GND.

IN– (Pin 3): Analog Input. This input must be free of noise

with respect to GND.

GND (Pin 4): Analog Ground. GND should be tied directly

to an analog ground plane.

VREF (Pin 5): Reference Input. The reference input defines

the span of the A/D converter and must be kept free of

noise with respect to GND.

DOUT (Pin 6): Digital Data Output. The A/D conversion

result is shifted out of this output.

CLK (Pin 7): Shift Clock. This clock synchronizes the serial

data transfer.

VCC (Pin 8): Power Supply Voltage. This pin provides

power to the A/D converter. It must be kept free of noise

and ripple by bypassing directly to the analog ground

plane.

LTC1198

CS/SHUTDOWN (Pin 1): Chip Select Input. A logic low on

this input enables the LTC1198. A logic high on this input

disables the LTC1198 and DISCONNECTS THE POWER TO

THE LTC1198.

CHO (Pin 2): Analog Input. This input must be free of noise

with respect to GND.

CH1 (Pin 3): Analog Input. This input must be free of noise

with respect to GND.

GND (Pin 4): Analog Ground. GND should be tied directly

to an analog ground plane.

DIN (Pin 5): Digital Data Input. The multiplexer address is

shifted into this input.

DOUT (Pin 6): Digital Data Output. The A/D conversion

result is shifted out of this output.

CLK (Pin 7): Shift Clock. This clock synchronizes the serial

data transfer.

VCC(VREF)(Pin 8): Power Supply and Reference Voltage.

This pin provides power and defines the span of the A/D

converter. It must be kept free of noise and ripple by

bypassing directly to the analog ground plane.

BLOCK DIAGRA

IN+ (CH0)

IN– (CH1)

VCC (VCC/VREF)

CS

(CS/SHUTDOWN) CLK

BIAS AND

SHUTDOWN CIRCUIT

SERIAL PORT

CSMPL

–

SAR

+

HIGH SPEED

COMPARATOR

CAPACITIVE DAC

DOUT

GND

PIN NAMES IN PARENTHESES

REFER TO THE LTC1198

VREF (DIN)

1196/98 BD

11

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