VORTEX86SX 查看數據表（PDF） - Unspecified

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VORTEX86SX

32-BIT x86 Embedded SoC

Unspecified 

D11

A12

E11

F11,F10

Vortex86SX

32-Bit x86 Embedded SoC

MA[9]/Strap[9]

MA[10]/Strap[10]

MA[11]/Strap[11]

MA[13:12]/

Strap[13:12]

Memory Address MA[9]. Normally, these pins are used as the row and

column address for SDRAM/DDR.

I/O Strap[9]. Pulled low: 33 PINS is for IDE2.

Pulled high: 33 PINS is for COM3/4 and Parallel Port. Default internal

pull-high.

Memory Address MA[10]. Normally, these pins are used as the row and

column address for SDRAM/DDR.

Strap[4]/[10]. SDRAM/DDR clock, Default pull low.

Strap[10]

I/O 0

Strap[4]

0

Memory clock

100MHz

0

1

133MHz (Internal default)

1

0

166MHz

1

1

200MHz

Memory Address MA[11]. Normally, these pins are used as the row and

I/O

column address for SDRAM/DDR.

Strap[11]. Pulled low is Internal RTC. Default internal pull-low.

Pulled high is External RTC

Memory Address MA[13:12]. Normally, these pins are used as the row and

column address for SDRAM/DDR.

I/O Strap[13:12]. 00 : flash-8bits

01 : flash-16bits

11 : Internal SPI. Default internal pull-high.

z USB 0, 1, 2, 3 (10 PINs)

PIN No.

Symbol

N26

USB0_DP

N25

USB0_DM

M26

USB1_DP

M25

USB1_DM

T26

USB2_DP

T25

USB2_DM

R26

USB3_DP

R25

USB3_DM

P26

REXT[0]:

U26

REXT[1]:

Type

I/O

I/O

I/O

I/O

I

I

Description

Universal Serial Bus Controller 0 Port 0. These are the serial data pair

for USB Port 0. 15kΩ pull down resistors are connected to DP and DM

internally.

Universal Serial Bus Controller 0 Port 1. These are the serial data pair

for USB Port 1. 15kΩ pull down resistors are connected to DP and DM

internally.

Universal Serial Bus Controller 1 Port 0. These are the serial data pair

for USB Port 2. 15kΩ pull down resistors are connected to DP and DM

internally.

Universal Serial Bus Controller 1 Port 1. These are the serial data pair

for USB Port 3. 15kΩ pull down resistors are connected to DP and DM

internally.

Universal Serial Bus Controller 0 External Reference Resistance. 510Ω

±10%

Universal Serial Bus Controller 1 External Reference Resistance. 510Ω

±10%

z PCI Bus Interface (56 PINs)

PIN No.

Symbol

B19, B18, C18

PREQ_[2:0]

D19, D18 ,C19

PGNT_[2:0]

D26

PCIRST_

A19

PCICLK_0

A18

PCICLK_1

A20

PCICLK_2

Type

Description

I

PCI Bus Request. These signals are the PCI bus request signals used as

inputs by the internal PCI arbiter.

O

PCI Bus Grant. These signals are the PCI bus grant output signals generated

by the internal PCI arbiter.

O

PCI Reset. This pin is used to reset PCI devices. When it is asserted low, all

the PCI devices will be reset.

O

PCI Clock Output. This clock is used by all of the Vortex86SX logic that is in

the PCI clock domain.

Vortex86SX Brief Datasheet

9

Version 1.001

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