W77E516 查看數據表（PDF） - Winbond
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W77E516 Datasheet PDF : 85 Pages
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Preliminary W77E516
EA: Global enable. Enable/disable all interrupts except for PFI.
ES1: Enable Serial Port 1 interrupt.
ET2: Enable Timer 2 interrupt.
ES: Enable Serial Port 0 interrupt.
ET1: Enable Timer 1 interrupt
EX1: Enable external interrupt 1
ET0: Enable Timer 0 interrupt
EX0: Enable external interrupt 0
Slave Address
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADDR
Address: A9h
SADDR: The SADDR should be programmed to the given or broadcast address for serial port 0 to
which the slave processor is designated.
Slave Address 1
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADDR1
Address: AAh
SADDR1: The SADDR1 should be programmed to the given or broadcast address for serial port 1
to which the slave processor is designated.
ISP Address Low Byte
Bit:
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Mnemonic: SFRAL
Address: ACh
Low byte destination address for In System Programming operations. SFRAH and SFRAL address
a specific ROM bytes for erasure, porgramming or read.
ISP Address High Byte
Bit:
7
6
5
4
3
2
1
0
A15 A14 A13 A12 A11 A10
A9
A8
Mnemonic: SFRAH
Address: ADh
High byte destination address for In System Programming operations. SFRAH and SFRAL address
a specific ROM bytes for erasure, porgramming or read.
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