XRT91L80(2005-03) 查看數據表（PDF） - Exar Corporation
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XRT91L80 Datasheet PDF : 41 Pages
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REV. P1.0.4
RECEIVER SECTION
NAME
LEVEL
RXCLK16P
RXCLK16N
LVDS
LOCKDET_CDR
LVTTL
LOSEXT
POLARITY
LVTTL
LVTTL
LOSDET
LVTTL
DISRD
LVTTL
PRELIMINARY
XRT91L80
2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
TYPE
O
O
I
I
O
I
PIN
DESCRIPTION
A6 155.52 (166) MHz Reference Clock
A7 This output clock reference is derived from the recovered clock
from the receive path.
C7 CDR Lock Detect
This pin is used to monitor the lock condition of the clock and
data recovery unit.
"Low" = CDR Out of Lock
"High" = CDR Locked
B5 LOS or SD input from optical module
This pin is provided with an internal active pull-down.
C4 Polarity for LOS input
Hardware Mode LOSEXT and POLARITY signals will be
Exclusive NORed internally to generate the correct polarity.
This pin is provided with an internal active pull-down.
C5 LOS Detect
Flags LOS condition based on LOS/SD signal from optical
module.
"Low" = No Alarm
"High" = A LOS condition is present
A3 Disable Receive Output Data Upon LOS
Hardware Mode If this pin is pulled "High", the receive output
data will automically pull "Low" when a LOS condition occurs.
"Low" = Disabled
"High" = Mute Data Upon LOS
This pin is provided with an internal active pull-down.
POWER AND GROUND
NAME
TYPE
PIN
VDDD3.3 PWR A8, D9, D10, D11, E11
AVDD3.3_Rx PWR
D3, E3
AVDD3.3_Tx PWR
P5, P9
DESCRIPTION
Digital 3.3V Power Supply
VDDD3.3 should be isolated from the analog power supplies. For
best results, use a ferrite bead along with an internal power plane
separation. The VDDD3.3 power supply pins should have bypass
capacitors to the nearest ground.
Analog 3.3V Receiver Power Supply
AVDD3.3_Rx should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_Rx power supply pins should
have bypass capacitors to the nearest ground.
Analog 3.3V Transmitter Power Supply
AVDD3.3_Tx should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The TVDD3.3_Tx power supply pins should
have bypass capacitors to the nearest ground.
9
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