PSD834F2-10J 查看數據表（PDF） - STMicroelectronics

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PSD834F2-10J

Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit + 256 Kbit Dual Flash Memories and 64 Kbit SRAM

STMicroelectronics 

PSD834F2V

INSTRUCTIONS

An instruction consists of a sequence of specific

operations. Each received byte is sequentially de-

coded by the PSD and not executed as a standard

WRITE operation. The instruction is executed

when the correct number of bytes are properly re-

ceived and the time between two consecutive

bytes is shorter than the time-out period. Some in-

structions are structured to include READ opera-

tions after the initial WRITE operations.

The instruction must be followed exactly. Any in-

valid combination of instruction bytes or time-out

between two consecutive bytes while addressing

Flash memory resets the device logic into READ

Mode (Flash memory is read like a ROM device).

The PSD supports the instructions summarized in

Table 7:

held Low, and Write Strobe (WR, CNTL0) High,

during Power-up for maximum security of the data

contents and to remove the possibility of a byte be-

ing written on the first edge of Write Strobe (WR,

CNTL0). Any WRITE cycle initiation is locked

when VCC is below VLKO.

READ

Under typical conditions, the MCU may read the

primary Flash memory or the secondary Flash

memory using READ operations just as it would a

ROM or RAM device. Alternately, the MCU may

use READ operations to obtain status information

about a Program or Erase cycle that is currently in

progress. Lastly, the MCU may use instructions to

read special data from these memory blocks. The

following sections describe these READ functions.

Flash memory:

Read Memory Contents. Primary Flash memory

■ Erase memory by chip or sector

) ■ Suspend or resume sector erase

t(s ■ Program a Byte

c ■ Reset to READ Mode

du ■ Read primary Flash Identifier value

ro ■ Read Sector Protection Status

P ■ Bypass

These instructions are detailed in Table 7. For ef-

te ficient decoding of the instructions, the first two

le bytes of an instruction are the coded cycles and

o are followed by an instruction byte or confirmation

s byte. The coded cycles consist of writing the data

b AAh to address X555h during the first cycle and

O data 55h to address XAAAh during the second cy-

- cle. Address signals A15-A12 are Don’t Care dur-

) ing the instruction WRITE cycles. However, the

t(s appropriate Sector Select (FS0-FS7 or

CSBOOT0-CSBOOT3) must be selected.

uc The primary and secondary Flash memories have

d the same instruction set (except for Read Primary

ro Flash Identifier). The Sector Select signals deter-

mine which Flash memory is to receive and exe-

P cute the instruction. The primary Flash memory is

te selected if any one of Sector Select (FS0-FS7) is

High, and the secondary Flash memory is selected

le if any one of Sector Select (CSBOOT0-

o CSBOOT3) is High.

bs Power-down Instruction and Power-up Mode

OPower-up Mode. The PSD internal logic is reset

and secondary Flash memory are placed in the

READ Mode after Power-up, chip reset, or a Reset

Flash instruction (see Table 7). The MCU can read

the memory contents of the primary Flash memory

or the secondary Flash memory by using READ

operations any time the READ operation is not

part of an instruction.

Read Primary Flash Identifier. The primary

Flash memory identifier is read with an instruction

composed of 4 operations: 3 specific WRITE oper-

ations and a READ operation (see Table 7). Dur-

ing the READ operation, address Bits A6, A1, and

A0 must be '0,' '0,' and '1,' respectively, and the ap-

propriate Sector Select (FS0-FS7) must be High.

The identifier for the device is E7h.

Read Memory Sector Protection Status. The

primary Flash memory Sector Protection Status is

read with an instruction composed of 4 operations:

3 specific WRITE operations and a READ opera-

tion (see Table 7). During the READ operation, ad-

dress Bits A6, A1, and A0 must be '0,' '1,' and '0,'

respectively, while Sector Select (FS0-FS7 or

CSBOOT0-CSBOOT3) designates the Flash

memory sector whose protection has to be veri-

fied. The READ operation produces 01h if the

Flash memory sector is protected, or 00h if the

sector is not protected.

The sector protection status for all NVM blocks

(primary Flash memory or secondary Flash mem-

ory) can also be read by the MCU accessing the

Flash Protection registers in PSD I/O space. See

upon Power-up to the READ Mode. Sector Select the section entitled “Flash Memory Sector Pro-

(FS0-FS7 and CSBOOT0-CSBOOT3) must be tect”, on page 22, for register definitions.

17/95

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