M66258FP 查看數據表（PDF） - Renesas Electronics
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M66258FP Datasheet PDF : 14 Pages
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M66258FP
Switching Characteristics
Access time
Output hold time
Output enable time
Output disable time
Item
(Ta = 0 to 70°C, VCC = 5 V ± 10%, GND = 0 V, unless otherwise noted)
Symbol
Min
Typ
Max
Unit
tAC
16
ns
tOH
3
ns
tOEN
3
16
ns
tODIS
3
16
ns
Timing Requirements
(Ta = 0 to 70°C, VCC = 5 V ± 10%, GND = 0 V, unless otherwise noted)
Item
Symbol
Min
Typ
Max
Unit
Write clock (WCK) cycle
Write clock (WCK) "H" pulse width
tWCK
tWCKH
20
ns
8
ns
Write clock (WCK) "L" pulse width
Read clock (RCK) cycle
tWCKL
tRCK
8
ns
20
ns
Read clock (RCK) "H" pulse width
Read clock (RCK) "L" pulse width
tRCKH
tRCKL
8
ns
8
ns
Input data setup time for WCK
Input data hold time for WCK
tDS
4
ns
tDH
3
ns
Reset setup time for WCK/RCK
Reset hold time for WCK/RCK
tRESS
tRESH
4
ns
3
ns
Reset non-selection setup time for WCK/RCK
Reset non-selection hold time for WCK/RCK
tNRESS
tNRESH
4
ns
3
ns
WE setup time for WCK
WE hold time for WCK
tWES
tWEH
4
ns
3
ns
WE non-selection setup time for WCK
WE non-selection hold time for WCK
tNWES
tNWEH
4
ns
3
ns
RE setup time for RCK
RE hold time for RCK
tRES
4
ns
tREH
3
ns
RE non-selection setup time for RCK
RE non-selection hold time for RCK
tNRES
tNREH
4
ns
3
ns
Input pulse up/down time
tr, tf
20
ns
Data hold time*
tH
20
ms
Notes: Perform reset operation after turning on power supply.
* For 1 line access, the following conditions must be satisfied:
WE high-level period ≤ 20 ms − 8192 • tWCK − WRES low-level period
RE high-level period ≤ 20 ms − 8192 • tRCK − RRES low-level period
REJ03F0252-0200 Rev.2.00 Sep 14, 2007
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