ISL85410 查看數據表（PDF） - Renesas Electronics
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ISL85410 Datasheet PDF : 21 Pages
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ISL85410
PWM
DCM
PULSE SKIP
DCM
PWM
CLOCK
IL
0
8 CYCLES
LOAD CURRENT
VOUT
VCOMP
VCSA
DUTY
CYCLE
IL
VOUT
FIGURE 43. DCM MODE OPERATION WAVEFORMS
Output Voltage Selection
The regulator output voltage is easily programmed using an
external resistor divider to scale VOUT relative to the internal
reference voltage. The scaled voltage is applied to the inverting
input of the error amplifier; refer to Figure 45.
The output voltage programming resistor, R3, depends on the
value chosen for the feedback resistor, R2, and the desired
output voltage, VOUT, of the regulator. Equation 3 describes the
relationship between VOUT and resistor values.
R3 = -V----O-R---U-2---T-x---0-–---.-6-0---.V--6---V---
(EQ. 3)
FIGURE 44. PWM OPERATION WAVEFORMS
Light Load Operation
At light loads, converter efficiency may be improved by enabling
variable frequency operation (PFM). Connecting the SYNC pin to
GND will allow the controller to choose such operation
automatically when the load current is low. Figure 43 shows the
DCM operation. The IC enters the DCM mode of operation when 8
consecutive cycles of inductor current crossing zero are detected.
This corresponds to a load current equal to 1/2 the peak-to-peak
inductor ripple current and set by Equation 2:
IOUT = V-----O---2-U---L-T---f--S--1--W--–-----D-----
(EQ. 2)
Where D = duty cycle, fSW = switching frequency, L = inductor
value, IOUT = output loading current, VOUT = output voltage.
While operating in PFM mode, the regulator controls the output
voltage with a simple comparator and pulsed FET current. A
comparator signals the point at which FB is equal to the 600mV
reference at which time the regulator begins providing pulses of
current until FB is moved above the 600mV reference by 1%. The
current pulses are approximately 300mA and are issued at a
frequency equal to the converters programmed PWM operating
frequency.
Due to the pulsed current nature of PFM mode, the converter can
supply limited current to the load. Should load current rise
beyond the limit, VOUT will begin to decline. A second comparator
signals an FB voltage 1% lower than the 600mV reference and
forces the converter to return to PWM operation.
If the desired output voltage is 0.6V, then R3 is left unpopulated
and R2 is 0Ω.
R2
FB
VOUT
EA
R3
0.6V
REFERENCE
FIGURE 45. EXTERNAL RESISTOR DIVIDER
Protection Features
The ISL85410 is protected from overcurrent, negative
overcurrent and over-temperature. The protection circuits
operate automatically.
Overcurrent Protection
During PWM on-time, current through the upper FET is monitored
and compared to a nominal 1.5A peak overcurrent limit. In the
event that current reaches the limit, the upper FET will be turned
off until the next switching cycle. In this way, FET peak current is
always well limited.
If the overcurrent condition persists for 17 sequential clock
cycles, the regulator will begin its hiccup sequence. In this case,
both FETs will be turned off and PG will be pulled low. This
FN8375 Rev 7.00
March 13, 2015
Page 15 of 21
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