F81865F 查看數據表（PDF） - Feature Integration Technology Inc.
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F81865F Datasheet PDF : 128 Pages
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F81865
9bit-mode Slave Address Register ⎯ Index F4h
Bit
Name
R/W Default
Description
This byte accompanying with SADEN_UR3 will determine the given address
and broadcast address in 9-bit mode. The UART will response to both given
and broadcast address.
Follow the description to determine the given address and broadcast address:
9. given address: If bit n of SADEN_UR3 is “0”, then the corresponding bit of
SADDR_UR3 is don’t care.
10. broadcast address: If bit n of ORed SADDR_UR3 and SADEN_UR3 is “0”,
7-0
SADDR_UR3 R/W 00h
don’t care that bit. The remaining bit which is “1” is compared to the
received address.
Ex.
SADDR_UR3
0101_1100b
SADEN_UR3
1111_1001b
Given Address
0101_1xx0b
Broadcast Address
1111_11x1b
9bit-mode Slave Address Mask Register ⎯ Index F5h
Bit
Name
R/W Default
Description
This byte accompanying with SADDR_UR3 will determine the given address
and broadcast address in 9-bit mode. The UART_UR3 will response to both
given and broadcast address.
Follow the description to determine the given address and broadcast address:
11. given address: If bit n of SADEN_UR3 is “0”, then the corresponding bit of
SADDR_UR3 is don’t care.
12. broadcast address: If bit n of ORed SADDR_UR3 and SADEN_UR3 is “0”,
7:0
SADEN_UR3 R/W 00h
don’t care that bit. The remaining bit which is “1” is compared to the
received address.
Ex.
SADDR_UR3
0101_1100b
SADEN_UR3
1111_1001b
Given Address
Broadcast Address
0101_1xx0b
1111_11x1b
8.14 UART4 Registers (CR13)
UART 4 Device Enable Register ⎯ Index 30h
Bit
Name
R/W Default
Description
7-1
Reserved
-
- Reserved
0: disable UART 4.
0
UR3_EN
R/W 1
1: enable UART 4.
Base Address High Register ⎯ Index 60h
Bit
Name
R/W Default
Description
7-0 BASE_ADDR_HI R/W 03h The MSB of UART 4 base address.
Base Address Low Register ⎯ Index 61h
Bit
Name
R/W Default
Description
7-0 BASE_ADDR_LO R/W E8h The LSB of UART 4 base address.
IRQ Channel Select Register ⎯ Index 70h
Bit
Name
R/W Default
Description
7-4
Reserved
-
- Reserved.
3-0
SELUR4IRQ
R/W 3h Select the IRQ channel for UART 4.
113
May, 2010
V0.28P
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