F81865F 查看數據表（PDF） - Feature Integration Technology Inc.
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F81865F Datasheet PDF : 128 Pages
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F81865
8.16 UART6 Registers (CR15)
UART 6 Device Enable Register ⎯ Index 30h
Bit
Name
R/W Default
Description
7-1
Reserved
-
- Reserved
0: disable UART 6.
0
UR6_EN
R/W 0
1: enable UART 6.
Base Address High Register ⎯ Index 60h
Bit
Name
R/W Default
Description
7-0 BASE_ADDR_HI R/W 00h The MSB of UART 6 base address.
Base Address Low Register ⎯ Index 61h
Bit
Name
R/W Default
Description
7-0 BASE_ADDR_LO R/W 00h The LSB of UART 6 base address.
IRQ Channel Select Register ⎯ Index 70h
Bit
Name
R/W Default
Description
7-4
Reserved
-
- Reserved.
3-0
SELUR6IRQ
R/W 3h Select the IRQ channel for UART 6.
IRQ Share Register ⎯ Index F0h
Bit
Name
R/W Default
Description
0: normal UART function
7 UR6_9BIT_MODE R/W 0 1: enable 9-bit mode (multi-drop mode).
In the 9-bit mode, the parity bit becomes the address/data bit.
6 UR6_AUTO_ADDR R/W
This bit works only in 9-bit mode.
0: the SM2 bit will be cleared by host, so that data could be received.
0 1: the SM2 bit will be cleared by hardware according to the sent address and
the given address (or broadcast address derived by SADDR_UR6 and
SADEN_UR6)
5 UR6_RS485_INV R/W 0 Invert RTS# if UR6_RS485_EN is set.
0: RS232 driver.
4 UR6_RS485_EN R/W 0 1: RS485 driver. Auto drive RTS# high when transmitting data, otherwise
is kept low.
0 : No reception delay when SIR is changed from TX to RX.
3
RXW4C_IR
R/W 0
1 : Reception delay 4 character-time when SIR is changed from TX to RX.
0 : No transmission delay when SIR is changed from RX to TX.
2
TXW4C_IR
R/W 0 1 : Transmission delay 4 character-time when SIR is changed from RX to TX.
0 : PCI IRQ sharing mode.
1
UR6IRQ_MODE R/W 0 1 : ISA IRQ sharing mode.
This bit is effective in IRQ sharing mode.
0 : IRQ is not sharing with other device.
0
UR6IRQ_SHARE R/W
0 1 : IRQ is sharing with other device.
IR Mode Select Register ⎯ Index F1h
Bit
Name
R/W Default
Description
7-5
Reserved
-
- Reserved. Return 010b when read.
0X: Disable IR1 function.
4-3
IRMODE1
R/W 00b 10 : Enable IR1 function, active pulse is 1.6uS.
IRMODE0
11 : Enable IR1 function, active pulse is 3/16 bit time.
117
May, 2010
V0.28P
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