CS53L32A 查看數據表（PDF） - Cirrus Logic

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CS53L32A

Low Voltage, Stereo A/D Converter

Cirrus Logic 

CS53L32A

SWITCHING CHARACTERISTICS - CONTROL PORT - TWO WIRE MODE

(TA = 25° C; VL = 1.7 V - 3.6 V; Inputs: logic 0 = GND, logic 1 = VL, CL = 30 pF)

Two Wire Mode

Parameter

Symbol

Min

Max

Unit

SCL Clock Frequency

fscl

-

RST Rising Edge to Start

tirs

500

Bus Free Time Between Transmissions

tbuf

4.7

Start Condition Hold Time (prior to first clock pulse)

thdst

4.0

Clock Low time

tlow

4.7

Clock High Time

thigh

4.0

Setup Time for Repeated Start Condition

tsust

4.7

SDA Hold Time from SCL Falling

(Note 8)

thdd

0

SDA Setup time to SCL Rising

tsud

250

Rise Time of Both SDA and SCL Lines

tr

-

Fall Time of Both SDA and SCL Lines

tf

-

Setup Time for Stop Condition

tsusp

4.7

100

KHz

-

ns

-

µs

-

µs

-

µs

-

µs

-

µs

-

µs

-

ns

25

ns

25

ns

-

µs

Note: 8. Data must be held for sufficient time to bridge the transition time, tf, of SCL.

RST

t irs

Stop

Start

Repeated

Start

SDA

SCL

t buf

t hdst

t high

t hdst

tf

t

t

low

hdd

t sud

t sust

tr

Figure 3. Control Port Timing - Two Wire Mode

Stop

t susp

DS513PP1

11

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