ISL8204M 查看數據表（PDF） - Renesas Electronics
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ISL8204M Datasheet PDF : 19 Pages
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ISL8204M, ISL8206M
Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted.
Please go to web to make sure you have the latest Rev. (Continued)
DATE
REVISION
CHANGE
October 13, 2010
FN6999.2
Updated the Simplified Block Diagram Figure 3 on page 2. Difference is on the ground connection near RSET-IN.
Page 17 under Reflow Parameters corrected number from “ANSI/J-STD-00” to “ANSI/J-STD-005”.
Changed Note 2 in ordering information from “These products do contain Pb but they are RoHS compliant by EU
exemption 5 (Pb in glass of cathode ray tubes, electronic
components and fluorescent tubes”. To “These Intersil plastic packaged products employ special material sets,
molding compounds and 100% matte tin plate plus anneal (e3) termination finish. These products do contain
Pb but they are RoHS compliant by EU exemption 5 (Pb in glass of cathode ray tubes, electronic components
and fluorescent tubes ). These Intersil RoHS compliant products are compatible with both SnPb and Pb-free
soldering operations. These Intersil RoHS compliant products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
On page 1:
Replaced Note 2 with the following: “These products do contain Pb but they are RoHS compliant by EU
exemption 5 (Pb in glass of cathode ray tubes, electronic components and fluorescent tubes).“
February 25, 2010
December 21, 2009
FN6999.1
FN6999.0
On page 4:
-Added Theta JC bottom : 2.0 C/W
-Changed Note 5: Theta-JA is measured in free air with the component mounted on a high effective thermal
conductivity test board (i.e. 4-layer type without thermal vias – see tech brief TB379) per JEDEC standards
except that the top and bottom layers assume solid planes.
-Added note: For Theta-JC bottom, the “case temp” location is the center of the package underside.
Updated Package Outline Drawing page 18:
Corrected pad width dimension in land pattern on page 19 from 3.10 to 3.00
(7th line down from top in column on left handside)
-Changes to Figure 30 as follows: From: “ SLOW RAMP AND SOAK …” To: “ SLOW RAMP (3C/sec max) AND SOAK
… “ From: “PEAK TEMPERATURE =230 – 245C; KEEP ABOUT 30s ABOVE 220 “
To: “PEAK TEMPERATURE = 230-245C ; typically 60s-70s ABOVE 220. Keep less than 30s within 5 degrees of
peak temp
-Changed the graphic to look more like 65 sec above 220 and 25 sec within 5 C of peak.
-Updated POD to most recent version -Added dimension 15.8+/-0.2 to bottom and right side of TOP VIEW.
changed 0.4+/-0.2 to (33x0.4)
Added Eval boards to ordering information
Updated title. Replaced Figures 3 and 7.
Initial Release.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
FN6999 Rev 4.00
October 28, 2014
Page 17 of 19
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